Semiconductor processing method of forming a buried contact

Details Semiconductor processing method of forming a buried contact Semiconductor processing method of forming a buried contact

2000-02-07

2001-09-04

Fourson, George (Department: 2823)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S233000, C438S453000

Reexamination Certificate

active

06284648

ABSTRACT:

TECHNICAL FIELD
This invention relates to semiconductor processing methods of forming buried contacts and to methods of making ohmic contact between a transistor gate line and a substrate diffusion region.
BACKGROUND OF THE INVENTION
Single semiconductor devices are grouped into integrated circuits, which in turn are further densified into large scale integrated semiconductor systems. The trend in semiconductor integrated circuitry fabrication continues to involve a decrease in the size of individual structures. However, this has been accompanied by an increase in the complexity and number of such structures aggregated on a single semiconductor integrated chip.
One type of integrated circuitry comprises memory circuitry. This invention arose out of problems or challenges inherent in producing a particular type of memory circuitry, namely static random access memory (SRAMs). Such circuitry typically interconnects a gate of one transistor device to a diffusion area of another transistor device in a semiconductor substrate. One typical prior art method of accomplishing such fabrication and interconnection is described with reference to
FIGS. 1-4
.
FIG. 1
illustrates a semiconductor wafer fragment
10
in process comprised of a bulk substrate region
12
and field oxide regions
13
. A gate oxide layer
14
overlies silicon substrate
12
. A conductive polysilicon layer
15
is provided over field oxide regions
13
and gate oxide layer
14
. Such will be utilized for fabrication of a transistor gate line of associated SRAM circuitry. A layer
16
of photoresist is provided atop the substrate, and provided with a patterned opening
17
therein.
Referring to
FIG. 2
, a contact opening
18
to bulk substrate
12
has been etched through polysilicon layer
15
and gate oxide layer
14
. A desired diffusion region
20
can be provided as shown. Then, the photoresist layer
16
of
FIG. 1
is stripped.
Referring to
FIG. 3
, a subsequent polysilicon layer
22
is deposited over first polysilicon layer
15
and to within contact opening
18
.
Referring to
FIG. 4
, layers
22
and
15
are patterned and etched to produce the illustrated transistor gate line
24
which extends over and ohmically connects with diffusion region
20
.
Although the invention arose out of concerns associated with achieving the above described SRAM interconnect, the artisan will appreciate applicability of the invention to other semiconductor fabrication techniques resulting in formation of buried contacts. Prior art buried contact techniques typically provide field oxide and associated devices fabricated relative to substrate active area. An insulating dielectric layer is subsequently deposited, with contact openings being patterned therethrough to desired diffusion regions within the active area, or to other device components. Aspects of this invention depart from such prior art techniques, with the invention only being limited by the accompanying claims appropriately interpreted in accordance with the doctrine of equivalents.


REFERENCES:
patent: 4012757 (1977-03-01), Koo
patent: 4380481 (1983-04-01), Shimbo
patent: 4748134 (1988-05-01), Holland et al.
patent: 5171714 (1992-12-01), Kimura
patent: 5393689 (1995-02-01), Pfiester et al.
patent: 6040221 (2000-03-01), Manning
patent: 6066549 (2000-05-01), Manning
patent: 018175 A2 (1980-10-01), None
patent: 8102493 (1981-09-01), None
Ghandhi, S.K. VLSI Fabrication Principles, John Wiley & Sons, 1983, pp. 576-582.

Affiliated with

Also associated with

Rating

Semiconductor processing method of forming a buried contact does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor processing method of forming a buried contact, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor processing method of forming a buried contact will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2507267