Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having schottky gate
Utility Patent
1999-08-16
2001-01-02
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having schottky gate
C438S172000, C313S422000, C445S030000
Utility Patent
active
06168982
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to methods of manufacturing an electronic device, for example, an active-matrix liquid-crystal display (hereinafter termed “AMLCD”) which comprises thin-film circuit elements, wherein self-aligned process steps are used. The invention also relates to electronic devices comprising thin-film circuit elements with self-aligned features. Typically the circuit element may be a thin-film field-effect transistor (hereinafter termed “TFT”). Instead of an AMLCD, the device may be, for example, another type of flat panel display or other large-area electronic device with thin-film circuit elements, for example, a thin-film data store or an image sensor.
OBJECTS AND SUMMARY OF THE INVENTION
For many years now, there has been much interest in the manufacture of TFTs and other thin-film circuit elements on glass and on other inexpensive insulating substrates for large area electronics applications. Thus, TFTs fabricated with amorphous or polycrystalline semiconductor films may form the switching elements of a cell matrix, for example, in an AMLCD as described in U.S. Pat. No. 5,130,829 (Our ref: PHB33646). A recent use involves the use of self-aligned techniques to reduce the number of separately aligned masking steps in the manufacture and/or to reduce parasitic effects (for example, parasitic capacitance) in the circuit elements. U.S. Pat. No. 5,264,383 (Our ref: PHB33727) describes an early example of such a method, wherein first and second parts of a thin-film circuit element are self-aligned with each other by shadow-masking in an angled exposure step during the manufacture. In the U.S. Pat. No. 5,264,383 method it is the gate electrode of a TFT that is used as the shadow mask, firstly in a perpendicular exposure and then in an angled exposure, for defining the lateral extent of highly-doped source and drain electrodes and a low-doped drain field-relief region. The whole contents of U.S. Pat. No. 5,130,829 and U.S. Pat. No. 5,264,383 are hereby incorporated herein as reference material.
It is an aim of the present invention to provide an improved and versatile self-alignment technique which may be adapted, particularly but not exclusively, for the manufacture of AMLCDs and similar large-area electronic devices.
According to the present invention there is provided a method of manufacturing an electronic device comprising thin-film circuit elements, as set out in Claim
1
. In this method, an upstanding post is provided at a first area of the substrate to one side of a second area where a thin-film circuit element is formed, and first and second parts of the circuit element are defined by respective first and second angled exposures from the direction of the upstanding post which acts as a shadow mask for part of the second area.
The nature of the upstanding post used in such a method in accordance with the invention is not constrained by it needing to form part of the circuit element. However, the post (or at least a part of it) can advantageously form part of the manufactured device. Thus, a plurality of the upstanding posts may be distributed over the substrate and may be at least partly retained in the manufactured device as supports on which a plate is mounted so as to be spaced from the substrate. This configuration is particularly useful for the manufacture of AMLCDs and similar flat-panel displays, where the plate and the substrate form front and back plates of the display device, with a display medium in the spacing defined by the supports.
REFERENCES:
patent: 3660706 (1972-05-01), Steinberg et al.
patent: 4259612 (1981-03-01), Christiano et al.
patent: 4605879 (1986-08-01), Rath
patent: 4644222 (1987-02-01), Brunn
patent: 5045847 (1991-09-01), Tarui
patent: 5053353 (1991-10-01), Black
patent: 5101261 (1992-03-01), Maeda
patent: 5102813 (1992-04-01), Kobayashi et al.
patent: 5114871 (1992-05-01), Jones
patent: 5130829 (1992-07-01), Shannon
patent: 5147823 (1992-09-01), Ishibashi et al.
patent: 5238861 (1993-08-01), Morin et al.
patent: 5264383 (1993-11-01), Young
patent: 5364717 (1994-11-01), Furaya et al.
patent: 5506467 (1996-04-01), Nishimura et al.
patent: 5634837 (1997-06-01), Nishimura et al.
patent: 5668018 (1997-09-01), Cronin et al.
patent: 401124933 (1989-05-01), None
patent: 405054793 (1993-03-01), None
Bowers Charles
Fox John C.
Schillinger Laura
U.S. Philips Corporation
LandOfFree
Manufacture of electronic devices comprising thin-film... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Manufacture of electronic devices comprising thin-film..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Manufacture of electronic devices comprising thin-film... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2504386