Electro-optical device having silicon nitride interlayer...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S059000, C257S072000, C257S365000, C257S366000, C257S640000, C257S649000

Reexamination Certificate

active

06198133

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an electric device having a non-light emitting type display such as a liquid crystal display, which an active matrix circuit is formed on a substrate by using thin film transistors (TFTs). In particular, the active matrix circuit of the electric device according to the present invention is drive-controlled by a driving circuit constructed by TFTs formed on the same substrate.
2. Description of the Related Art
Recently, a liquid crystal display is used as a display in an various electric devices of a portable type (for example, a personal computer, a word processor, or an electric pocket note book), by utilizing that the liquid crystal display is thin and light in weight. In particular, since an active matrix type liquid crystal display which controls each pixel one by one using TFTs has superior display characteristic, it is used in many electric devices.
There are various types of an active matrix type liquid crystal displays. One display (first type) has an active matrix circuit formed by using TFTs and its driving circuit constructed by a single crystalline semiconductor integrated circuit chip of an external type. Since it is necessary to connect semiconductor chips and semiconductor packages with a portion around a glass substrate in such unit by using TAB (Tape Automated Bonding) or the like, a display gets relatively large. Also, since a width of wirings (interconnection) extending from the active matrix circuit get small to improve an opening (aperture) rate and the total number of wirings exceeds 1000, there is a technical problem in wiring connection. Further, a large area is required in a connection portion. Furthermore, since thermal expansion coefficients between wirings in a glass substrate and wirings in an external chip and thermal expansion coefficients between the wiring in the glass substrate and a tape in a TAB are different from each other, alignment precision is about 60 &mgr;m. Therefore, it cannot be applied to a high resolution display which has a pixel pitch of 60 &mgr;m or shorter and miniaturization of a display cannot be performed, so that a TFT using an amorphous silicon which can be formed at a low temperature is used in such display.
Another display (second type) has a thin film integrated circuit having an active matrix circuit and driving circuits such as an X-decoder/driver and a Y-decoder/driver which are formed on the same substrate using TFTs. Since an external type semiconductor chip as described above is not used in such display device, a display gets relatively small. Also, since it is not necessary to connect with many wirings, it is superior in miniaturization of a display. In such display, it is necessary to use TFTs constructed by a crystalline silicon having a superior characteristic in a driving circuit.
As a result, the second type display is superior to the first type display in miniaturization of a display. In the second type display, however, further miniaturization, light weighting and thinning are not performed insufficiently. That is, in a personal computer, various semiconductor chips such as a central processing unit (CPU), a main memory, an image signal processing unit, an image memory and the like are formed in a main substrate (main board) other than a liquid crystal display board, and therefore it is necessary to use at least two substrates or boards (main board and liquid crystal display board). To further miniaturization, light weighting and thinning of a display, it is desired to use only one board in stead of two boards.
SUMMARY OF THE INVENTION
The present invention is to perform miniaturization, light weighting and thinning of a display, by arranging semiconductor chips as provided in the above main board in at least one substrate in the a liquid crystal display which a liquid crystal material is held between a pair of substrates. In particular, these chip are provided in a substrate (board) in which an active matrix circuit is formed. Also, a driving circuit for driving the active matrix circuit is formed by using thin film transistors (TFTs).
According to the present invention, there is provided an electric device comprising: a substrate; an active matrix circuit including at least one thin film transistor; a driving circuit including at least another one thin film transistor for driving the active matrix circuit; and at least one semiconductor integrated circuit chip for controlling the driving circuit, wherein the active matrix circuit, the driving circuit and semiconductor integrated circuit chip are formed on the substrate.


REFERENCES:
patent: 4068020 (1978-01-01), Reuschel
patent: 4103297 (1978-07-01), McGreivy et al.
patent: 4239346 (1980-12-01), Lloyd
patent: 4363828 (1982-12-01), Brodsky et al.
patent: 4365013 (1982-12-01), Ishioka et al.
patent: 4378417 (1983-03-01), Maruyama et al.
patent: 4395726 (1983-07-01), Maeguchi
patent: 4460670 (1984-07-01), Ogawa et al.
patent: 4470060 (1984-09-01), Yamazaki
patent: 4500388 (1985-02-01), Ohmura et al.
patent: 4565584 (1986-01-01), Tamura et al.
patent: 4581476 (1986-04-01), Yamazaki
patent: 4581620 (1986-04-01), Yamazaki et al.
patent: 4584025 (1986-04-01), Takaoka et al.
patent: 4591892 (1986-05-01), Yamazaki
patent: 4597160 (1986-07-01), Ipri
patent: 4609930 (1986-09-01), Yamazaki
patent: 4621276 (1986-11-01), Malhi
patent: 4651408 (1987-03-01), MacElwee et al.
patent: 4659392 (1987-04-01), Vasudev
patent: 4680580 (1987-07-01), Kawahara
patent: 4690717 (1987-09-01), Yamazaki
patent: 4693759 (1987-09-01), Noguchi et al.
patent: 4697887 (1987-10-01), Okada et al.
patent: 4729009 (1988-03-01), Ang
patent: 4740829 (1988-04-01), Nakagiri et al.
patent: 4743567 (1988-05-01), Pandya et al.
patent: 4748485 (1988-03-01), Vasudev
patent: 4755865 (1988-07-01), Wilson et al.
patent: 4760008 (1988-07-01), Yamazaki et al.
patent: 4766477 (1988-08-01), Nakagawa et al.
patent: 4772927 (1988-09-01), Saito et al.
patent: 4795679 (1989-01-01), Ramesh et al.
patent: 4814842 (1989-03-01), Nakagawa et al.
patent: 4818077 (1989-04-01), Ohwada et al.
patent: 4838654 (1989-06-01), Hamaguchi et al.
patent: 4849797 (1989-07-01), Ukai et al.
patent: 4860069 (1989-08-01), Yamazaki
patent: 4862237 (1989-08-01), Morozumi
patent: 4864376 (1989-09-01), Aoki et al.
patent: 4885052 (1989-12-01), Fan et al.
patent: 4888305 (1989-12-01), Yamazaki et al.
patent: 4891330 (1990-01-01), Guha et al.
patent: 4897360 (1990-01-01), Guckel et al.
patent: 4905073 (1990-02-01), Chen et al.
patent: 4938565 (1990-07-01), Ichikawa
patent: 4949141 (1990-08-01), Busta
patent: 4951113 (1990-08-01), Huang et al.
patent: 4959700 (1990-09-01), Yamazaki
patent: 4969025 (1925-11-01), Yamamoto et al.
patent: 4969031 (1990-11-01), Kobayashi et al.
patent: 4984033 (1991-01-01), Ishizu et al.
patent: 4986213 (1991-01-01), Yamazaki et al.
patent: 4988638 (1991-01-01), Huang et al.
patent: 5003356 (1991-03-01), Wakai et al.
patent: 5012228 (1991-04-01), Masuda et al.
patent: 5037766 (1991-08-01), Wang
patent: 5043772 (1991-08-01), Yamazaki
patent: 5051570 (1991-09-01), Tsujikawa et al.
patent: 5055899 (1991-10-01), Wakai et al.
patent: 5056895 (1991-10-01), Kahn
patent: 5057889 (1991-10-01), Yamada et al.
patent: 5057898 (1991-10-01), Adan et al.
patent: 5065208 (1991-11-01), Shah et al.
patent: 5077223 (1991-12-01), Yamazaki
patent: 5082351 (1992-01-01), Fergason
patent: 5084905 (1992-01-01), Sasaki et al.
patent: 5132754 (1992-07-01), Serikawa et al.
patent: 5132820 (1992-07-01), Someya et al.
patent: 5132821 (1992-07-01), Nicholas
patent: 5148301 (1992-09-01), Sawatsubashi et al.
patent: 5151689 (1992-09-01), Kabuto et al.
patent: 5233211 (1993-08-01), Hayashi et al.
patent: 5236544 (1993-08-01), Yamagata
patent: 5247191 (1993-09-01), Yamazaki et al.
patent: 5250818 (1993-10-01), Saraswat et al.
patent: 5250931 (1993-10-01), Misawa et al.
patent: 5261153 (1993-11-01), Lucas
patent: 5261156 (1993-11-01), Mase
patent: 5270224 (1993-12-01), Furumura et al.
patent: 5270567 (1993-12-01), Mori et al.
patent: 5274279 (1993-12-01), Misa

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