Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1999-08-02
2001-09-18
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S680000
Reexamination Certificate
active
06291346
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a titanium silicide (TiSi
2
) layer formation method and a method of manufacturing a semiconductor device having a TiSi
2
layer, more particularly to a titanium silicide (TiSi
2
) layer formation method in which a titanium (Ti) layer is formed by supplying TiCl
4
gas onto a silicon (Si) layer together with a carrier gas at a prescribed temperature by a CDV (Chemical Vapor Deposition) method and a TiSi
2
layer is selectively formed by having the Ti layer react with the Si layer.
2. Description of Related Art
In a semiconductor device such as a LSI, in order to obtain electric conductivity between the diffusion layer formed on the semiconductor substrate and the first metal, W plugs are embedded in the contact holes by the CDV method so as to use the W plugs as wires in the vertical direction. Since these W plugs adhere poorly to the oxide film which forms the outside wall of the contact holes, an adhesion layer such as a Ti layer and titanium nitride (TiN) layer is first formed on the contact hole surface by the spatter method and then a W layer is formed. After the Ti layer and TiN is formed, a RTA (Rapid Thermal Annealing) process is performed under the atmosphere of N
2
and NH
3
, and the Ti layer formed on the Si substrate is made to react with the Si substrate to form a TiSi
2
layer. By forming a TiSi
2
layer on a Si layer in this manner, low contact resistance can be obtained.
Moreover, in recent years, due to the demand caused by the increased capacity of memories and the increased degree of integration of devices, memory cell size reduction research has been being advanced. As a result, the aspect ratio of the contact hole tends to be increased. However, in the case the aspect ratio of the contact hole is increased, if a Ti layer or a TiN layer is formed by the spatter method, the coverage deteriorates. As a result, a stable and satisfactory contact characteristic cannot be obtained, which is a problem. Hence, as a replacement of the spatter method, a technique for forming adhesion layers such as Ti layer and TiN layer by the CVD method has been developed and is receiving attention.
In this CVD method, a Ti layer is formed, for example, by flowing TiCl
4
gas on the substrate. According this CVD method, the Ti layer can be formed with a satisfactory degree of coverage even inside a contact hole having a very high aspect ratio. Moreover, according this CVD method, the Ti layer is formed at relatively high temperature. Therefore, when the Ti layer is formed on the Si layer, the Ti layer reacts with the Si layer. As a result, a TiSi
2
layer is selectively formed. Therefore, unlike the case in which a Ti layer is formed by the spatter method, according this CVD method, a TiSi layer can be formed on the Si layer (diffusion layer) inside the contact hole without performing a RTA process. In this case, the Ti layer does not react with an oxide layer film or nitride layer film. Hence, the Ti layer is not formed on the side wall of the contact hole (oxide layer film) as it is. After this, a TiN layer is formed by the CVD method.
In what follows, a Ti layer formed on an oxide film or nitride film by the CVD method will be referred to as a CVD-Ti layer. Similarly, a TiSi
2
layer formed by having a Ti layer formed on a Si layer react with Si by the CVD method will be referred to as a CVD-TiSi
2
layer.
In order to obtain electric conductivity between the CVD-TiSi
2
layer and the first metal, a tungsten (W) plug is formed inside the contact hole. This W plug is formed by filling W inside the contact hole by the CVD method and then removing the portion of the W layer not used for forming the plug by performing over-etching by an etch back process. However, in carrying out this etch back process, the W layer formed inside the plug is also etched. As a result, a recess is generated. In the case a large recess is made, for example, in forming a metal layer such as a layer of aluminum (Al) alloy in the next process, a step is created and the flatness of the layer is lost. This causes difficulty in patterning, which is a problem. Moreover, if the coverage of the Al alloy deteriorates, the reliability of the semiconductor device is reduced. Therefore, it is important to suppress the recess generation.
To cope with these problems, a method of carrying out a flattening process by the CMP (Chemical Mechanical Polishing) technique without etch-back processing the W layer formed besides the plug is being developed. According to this CMP technique, the recess generation inside the plug can be suppressed and the degree of flatness can be improved. With reference to
FIGS. 3
,
4
, and
5
, the method of forming a W plug by the CMP technique forming a TiSi
2
layer on a diffusion layer on a Si substrate inside the contact hole will be explained.
First, as shown in
FIG. 3
, an interlayer insulating film
102
is deposited on a semiconductor substrate
101
on which a device is formed. A contact hole
103
is then opened to obtain conductivity to the diffusion layer
108
of the Si substrate
101
.
Next, a Ti film is formed by the spatter method to create a Ti layer
104
, and a TiN film is formed by the spatter method to create a TiN layer
105
. Next, by applying a RTA process, the diffusion layer (Si layer) of the Si substrate
101
is made to react with the Ti layer
104
to form a TiSi
2
layer
106
on the diffusion layer
108
on the Si substrate
101
. In the case the CVD-Ti layer
104
is formed by the CVD method, without performing a RTA process, the CVD-Ti layer
104
reacts with the Si substrate
101
. As a result, the CVD-Ti layer
106
is selectively formed. This Ti layer
106
is formed to obtain low contact resistance.
Next, as shown in
FIG. 4
, a film of W is formed by the CVD method to form a W layer
107
. Moreover, as shown in
FIG. 5
, the portion of the W layer
107
not used for forming the plug is removed by the CMP method to form the W plug. After this, the contaminants generated during the CMP process is removed with diluted hydrofluoric acid water. Thus, a W plug is formed inside the contact hole.
However, even if the TiSi
2
layer is formed on the diffusion layer inside the contact hole by the spatter method or CVD method, in the case a W plug is formed by the CMOP method, the contaminants generated during the CMP process need to be removed with diluted hydrofluoric acid water. This hydrofluoric acid water dissolves Ti. Therefore, when the contaminants are removed, the Ti layer formed on the side wall of the contact hole is also etched. As a result, a cavity is created between the interlayer insulating film and the TiN film, which is a problem. Moreover, if the reaction advances and the TiSi
2
layer is etched, the electric conductivity between the TiSi
2
layer and the W plug is lost, resulting in contact conductivity failure, which is also a problem.
On the other hand, to prevent this problem, a TiN film forming method in which a TiN film is formed after removing the Ti layer formed on the side wall of the contact hole by a selective etching process with ammonia aqueous solution the like is known. According to this method, a TiN film is formed directly on the side wall of the contact hole without first forming a Ti layer on the side wall of the contact hole. Therefore, even if diluted hydrofluoric acid water is used to remove the contaminants generated by the CMP process, the etching by the diluted hydrofluoric acid water does not proceed to the TiSi
2
layer. Hence, contact conductivity failure does not occur. However, this method requires a new process for removing the Ti layer. This new process is expensive, and results in a high manufacturing cost, which is a problem.
SUMMARY OF THE INVENTION
Given these problems, it is an object of the present invention to provide a novel and improved TiSi
2
layer formation method capable of forming a TiSi
2
layer only on a Si layer without forming a Ti layer in any part besides the Si layer. It is also an object of the present inve
Jones Volentine PLLC
Le Dung A
Nelms David
OKI Electric Industry Co., Ltd.
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