Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1998-12-07
2001-03-06
Saadat, Mahshid (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S335000, C257S336000, C257S338000, C257S340000, C257S344000, C257S345000, C257S346000, C257S349000
Reexamination Certificate
active
06198131
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to a semiconductor fabricating method. More particularly, the present invention relates to a method of forming a metal oxide semiconductor.
2. Description of Related Art
Due to the increasing number of semiconductor elements incorporated in integrated circuits, the size of metal oxide semiconductor (MOS) components is greatly reduced. Accordingly, as the channel length of the MOS is decreased, the operating speed is increased. However, there is an increased likelihood of a problem, referred to as “short channel effect”, caused by the reduced channel length. If the voltage level is fixed, according to the equation of “electrical field=electrical voltage/channel length”, as the channel length is shortened, the strength of electrical field is increased. Thus, as the intensity of electrical filed increases, electrical activity increases and electrical breakdown is likely to occur.
To solve the problem of electrical breakdown, a method to fabricate a high voltage device being able to withstand a high intensity of electric field has been developed. An isolation structure and a drift region, which is below the isolation structure, are formed on a substrate between a gate and a source/drain of a MOS to increase the distance between the source/drain region and the gate.
In the application of radio frequency (RF), a higher power gain is required to improve frequency response. The method to obtain a higher power gain is to increase the transconductance of the devices. While increasing the transconductance of devices, the intensity of electrical field of the junction between the source region and the channel region increases. In other words, as the electrical field of the channel region increases, the transconductance of the device is increased. In order to avoid the short channel effect and electrical breakdown, the electrical field of channel region must be limited. Thus, a high transconductance is difficult to obtain in the conventional fabrication method of a MOS.
FIG. 1
is a cross-sectional view showing a conventional fabrication process of forming a lateral double-diffused MOS (LDMOS).
In
FIG. 1
, a conventional LDMOS includes a P-type substrate
100
, a field oxide layer
101
, a gate oxide layer
102
, a gate layer
103
, an N
+
drain region
104
, an N
−
drift region
105
, a N
+
source region
106
, and a P-doped region
107
.
The dopant concentration in the N
−
drift region
105
is lightened in the conventional LDMOS in order to achieve a high voltage operation. However, this level of enhance voltage is limited, and consequently, the driving current is reduced. In the application of radio frequency, a higher transconductance is required, that is, the intensity of electrical field strength at the junction between the source region and the channel is increased, or the dopant concentration in the P-doped region of the source region is increased. In this manner, an electrical breakdown is easily caused. Hence, the increase of transconductance is not easy to achieve. Therefore, the application of conventional LDMOS is limited.
SUMMARY OF THE INVENTION
It is an object of the invention to provide a fabricating method of a high-voltage MOS device. The transconductance of the device is increased to withstand a high breakdown voltage with an enhanced current driving performance.
It is another object of the invention to provide a method of forming a high-voltage MOS device to form a channel region comprising a first part being heavily doped and a second part being lightly doped. The first part is applied with an electrical field with a high intensity to increase the transconductance, while the second part prevents electric breakdown.
It is yet another object of the invnetion to provide a method to fabricate a high voltage MOS device. Two portions with different doping concentration are formed aside the drain region of the MOS device. Apart from preventing electric breakdown as mentioned above, the performance of driving current is enhanced.
Accordingly, the present invention provides a fabricating method of a high-voltage metal oxide semiconductor. Two channel regions with different concentrations are formed in a channel region. Two grading regions with different concentrations are formed around the side wall of drain region. The channel region with high concentration can increase the internal electrical field. And thus, the transconductance of components is increased. The other channel region with low concentration can be used to avoid the electrical breakdown. Moreover, the two grading regions formed around the sidewall of the drain region not only avoid electrical breakdown but also increases the capability of current driving.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and are intended to provide further explanation of the invention as claimed.
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Ortiz Edgardo
Saadat Mahshid
United Microelectronics Corp.
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