Method of forming capacitors on integrated circuit

Details Method of forming capacitors on integrated circuit Method of forming capacitors on integrated circuit

1999-01-25

2001-07-31

Wojciechowicz, Edward (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S303000, C257S306000, C257S532000, C438S386000, C438S648000, C438S656000, C438S685000, C438S703000

Reexamination Certificate

active

06268620

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to semiconductor devices, and more particularly to a method of fabricating a capacitor on a semiconductor device.
BACKGROUND OF THE INVENTION
Capacitors are used as part of integrated circuits as analog components or, for example, as memory cells in digital circuits. It is well known from basic physics that for a capacitor the capacitance is proportional to the product of the area of the electrodes and the dielectric constant &egr;, and inversely proportional to the thickness t of the dielectric. With increasing reduction in scale of semiconductor devices, the minimum physical size of the capacitors required to provide the necessary capacitance becomes a limiting factor.
It has been proposed to increase the size of the electrodes by varying their shape. It has also been proposed to increase the dielectric constant of the dielectric material. Typically, silicon dioxide is used as the dielectric, and this has been replaced by tantalum oxide (Ta
2
O
5
), which is actually known to have a high dielectric constant. The formation of a tantalum oxide dielectric is a complicated process involving multiple steps and tool changes.
An object of the invention is to provide a simple process for producing small dimension, high capacitance capacitors on semiconductor devices.
SUMMARY OF THE INVENTION
Accordingly, the present invention provides a method of making a semiconductor device, comprising the steps of providing an insulating layer; forming a series of holes in said insulating layer; depositing a first conductive layer of a metal, or a compound thereof, over said insulating layer such that said first conductive layer covers an upper surface of said insulating layer and lines said holes formed therein; forming a dielectric layer over said first layer, said dielectric consisting of a compound of said metal; and forming a second conductive layer of said metal, or a compound thereof, over said dielectric layer; whereby said first, second and dielectric layers form a conformal capacitive sandwich structure extending into said holes.
In a preferred embodiment, the metal is titanium, and the first and second layers are made of titanium nitride (TiN). The dielectric layer is titanium oxide (TiO
2
), which has a dielectric constant approximately 9 times greater than the dielectric constant of silicon dioxide. The invention can also be implemented with other metals, for example, tantalum, which has an oxide (Ta
2
O
5
) with a high dielectric constant. If other metals are employed, it may be necessary to include additional intermediate layers. For example, it is possible to make a tantalum/tantalum nitride/tantalum oxide/tantalum nitride/tantalum structure. Tantalum nitride has too low a conductivity to be used as an electrode, but it can serve as an interface between tantalum and tantalum oxide.
The holes can be formed using conventional anisotopic etch techniques. In order to reduce the electric field strength at the edges of the holes, which would arise due to the point effect, the substrate is subjected to an isotopic etch or sputter cleaning prior to deposition of the layers forming the capacitor.
The three layers are preferably deposited in the same reactive sputtering chamber using a non-oxidized titanium target with a collimator. A collimator is a honeycomb structure that directs the titanium flux from the sputtering target in the vertical direction onto the workpiece. This ensures that the layers have an even thickness on the top surface of the substrate and in the holes.
Another advantage of a collimator is that the titanium flux between the target and the collimator is many times greater than the flux between the collimator and the workpiece. As a result, it is possible to deposit titanium oxide on the substrate without oxidizing the target. The oxidation occurs on the surface of the substrate and most other surfaces under the collimator. As a result an even layer thickness can be attained.
The anisotropic etching typically takes place in a separate tool. The substrate is then transferred to a second tool to form the bevel on the edges of the holes. It is then transferred to a different chamber in the same tool where the sputter deposition of the three layers takes place. Firstly, titanium nitride (TiN) is deposited in the presence of nitrogen gas. Then, in order to deposit the dielectric layer, it is merely necessary to change the reactive gas to oxygen, and finally the gas is changed back again to nitrogen in order to form the upper conductive layer. The sputtering is typically carried in the presence of argon.
The invention also provides a semiconductor device comprising an insulating layer having a plurality of holes formed therein; a first conductive layer of a metal, or a compound thereof, formed over said insulating layer and lining said holes formed therein; a dielectric layer formed on said first layer, said dielectric consisting of a compound of said metal; and a second conductive layer of said metal, or a compound thereof, formed over said dielectric layer; whereby said first, second and dielectric layers form a conformal capacitive sandwich structure extending into said holes.


REFERENCES:
patent: 5172201 (1992-12-01), Suizu
patent: 5189503 (1993-02-01), Suguro et al.
patent: 5290609 (1994-03-01), Horiiki et al.
patent: 5889300 (1999-03-01), Figura et al.
patent: 0188946 (1986-07-01), None

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