Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
1998-09-01
2001-06-12
Smith, Matthew (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000, C710S120000
Reexamination Certificate
active
06247161
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to computer chip architectures, and more particularly to an on-chip data transfer network that includes a multiple ring architecture with re-configurable paths for improved information routing between multiple on-chip modules.
2. Description of the Related Art
Computer systems have traditionally comprised a system unit or housing which comprises a plurality of electrical components comprising the computer system. A computer system typically includes a motherboard, which is configured to hold the microprocessor and memory, and the one or more busses used in the computer system. The motherboard typically comprises a plurality of computer chips or electrical components including intelligent peripheral devices, bus controllers, processors, bus bridges, etc.
More recently, computer systems are evolving toward an integration of functions into a handful of computer chips. This coincides with the ability of chip makers to place an increasingly large number of transistors on a single chip. For example, currently chip manufacturers are able to place up to ten million transistors on a single integrated circuit or monolithic substrate. It is anticipated that within several years chip makers will be able to place one billion transistors on a single chip. Thus, computer systems are involving toward comprising a handful of computer chips, where each computer chip comprises a plurality of functions. The integration of a plurality of modules or functions on a single computer chip requires an improved data transfer chip architecture. Also, due to the shorter distances and tighter integration of components on a chip, new data transfer architectures are necessary to take advantage of this environment. Therefore, an improved system and method is desired for including a plurality of different functions or modules on a single computer chip while providing efficient data transfers.
SUMMARY OF THE INVENTION
The present invention comprises a computer chip including a data transfer network. The data transfer network comprises a plurality of communications links for transmitting data, a plurality of communication nodes, and a plurality of modules. Each of the communication nodes are directly connected to two or more other communication nodes through respective ones of the plurality of communications links. Each of the communication nodes is operable to communicate data over the plurality of communications links. Each of the plurality of modules is coupled to at least one of the plurality of communication nodes, and the plurality of modules are operable to communicate with each other through the communication nodes. The plurality of communication nodes are operable to create dynamic routes for the data transferred between any two or more of the plurality of modules over the respective ones of the plurality of communications links. The plurality of communication nodes form the dynamic routes based on statistical data on previous transmissions between the plurality of modules.
In various embodiments, each of the plurality of communication nodes includes respective configuration logic for dynamically configuring the dynamic routes, and each of the configuration logics may include a memory for storing the statistical data on previous transmissions which passed through a respective communications node. Each of the data transmissions includes transfer information regarding a source, a destination, a number of data units, and a time value indicating an initialization of transfer. Configuration logic in each communication node monitors the data transmissions and extract the transfer information to obtain the statistical data. The data transfer network may also comprise a routing module for controlling the dynamic routes based on statistical data. The routing module couples to each of the plurality of communication nodes and monitors the configuration logic. When present and functioning, the routing module adapts the dynamic routes based on an analysis of the statistical data.
In various embodiments, the statistical data includes one or more of the following for each respective transmission: a priority, a source, a destination, a number of data units included, an elapsed transfer time or a maximum allowed delivery time, and a total number of transmissions which pass through a given communications node. In one embodiment, the plurality of communication nodes is bi-directionally coupled and is operable to communicate data with each other.
REFERENCES:
patent: 4293948 (1981-10-01), Soderblom
patent: 4468734 (1984-08-01), Lanier et al.
patent: 4797882 (1989-01-01), Maxemchuk
patent: 4825206 (1989-04-01), Brice, Jr. et al.
patent: 4933933 (1990-06-01), Dally et al.
patent: 5041963 (1991-08-01), Ebersole et al.
patent: 5138615 (1992-08-01), Lamport et al.
patent: 5153876 (1992-10-01), Sin
patent: 5394389 (1995-02-01), Kremer
patent: 5400331 (1995-03-01), Lucak et al.
patent: 5577213 (1996-11-01), Avery et al.
patent: 5715397 (1998-02-01), Ogawa et al.
patent: 5761516 (1998-06-01), Rostoker et al.
patent: 5872998 (1999-02-01), Chee
patent: 5908468 (1999-06-01), Hartmann
Itano, et al “HIRB: A Hierarchical Ring Bus” University of Tsukuba, Japan, Proceedings of the Nineteenth Annual Hawaii International Conference on System Sciences, 1986, pp 206-213.
Godfrey Gary Michael
Hartmann Alfred C.
Lambrecht J. Andrew
Advanced Micro Devices , Inc.
Conley Rose & Tayon PC
Hood Jeffrey C.
Siek Vuthe
Smith Matthew
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