System ROM including a flash EPROM and a ROM for storing...

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules

Reexamination Certificate

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Reexamination Certificate

active

06182187

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to replacing a boot block flash EPROM used as a system ROM with a more conventional flash EPROM and a second ROM for storing primary boot code.
2. Description of the Related Art
A basic computer system typically includes a microprocessor, a memory system and input/output (I/O) devices. The I/O devices typically include a display, a keyboard or mouse and possibly other communication devices, and also storage devices including diskette or floppy drives and hard or fixed disk drives. The memory system may include a very fast cache used to store frequently accessed memory or data, relatively fast main memory comprising random access memory (RAM) for storing programs and instructions during operation of the computer system, and read only memory (ROM) for storing permanent information generally used on a regular basis, such as short programs and routines, tables of fixed data, and routines and data used for display of characters. ROMs are nonvolatile so that their data is permanent and remains valid while the computer system is powered off. Thus, ROMs are ideal for stored and coded information representing the sequence of internal control variables for initializing or enabling the various operations in the computer system upon power-up. One or more ROMs used for this purpose are generally referred to as the system ROM.
For example, in an IBM PC/AT or compatible computer system, a system ROM is used to store the basic input output system (BIOS) executed upon power up by the microprocessor for system initialization and for performing certain low level, hardware dependent operations. In particular, the system ROM stores routines executed by the microprocessor for initialization of the computer system, including routines for power on self tests (POST), interaction with the display, floppy and fixed disk drives, and routines to interface communication devices as well as peripheral devices. More sophisticated routines and data may be included in the system ROM depending upon the needs and complexity of a given computer system. However, a certain minimum amount of code in the system ROM is necessary to initialize a computer system and must not be lost. This minimum necessary code will be referred to as the primary boot code, which must at least initialize the microprocessor, at least one floppy disk drive, the video controller, the keyboard or mouse and establish access to the system ROM itself for reprogramming, if necessary.
The primary boot code is generally well defined and not subject to changes. Once the primary boot code is executed, the microprocessor executes some or all of the remaining code in the system ROM to complete the boot procedure. This remaining or secondary boot code is used for other I/O and peripheral devices and is generally subject to modifications. For example, errors and bugs requiring correction and new versions or new releases of the secondary boot code are common, so that portions of the system ROM for storing the secondary boot code should be reprogrammable. Otherwise, the entire system ROM must be replaced in the event of fixes, enhancements or upgrades.
Several types of ROMs are commercially available. A basic ROM, referred to as a masked ROM, has its code hardwired internally at the factory and thus can not be reprogrammed later. Masked ROMs have been used as system ROMs, but must be completely replaced if changes in the boot code are desired or necessary. Since enhancements and upgrades are common, masked ROMs are not preferred for use as system ROMs because of lead time and minimum quantity problems. Another type of ROM similar to the masked ROM is referred to as a one-time programmable (OTP) ROM. The OTP ROM is programmed once by the user or supplier of a computer system, but cannot be reprogrammed. OTP ROMs are better than masked ROMs for system ROM purposes since the computer manufacturer or supplier has control over the boot code programmed into the OTP ROMs and can provide upgraded ROMs more readily. Nonetheless, OTP ROMs are undesirable by themselves to comprise the system ROM since they are also not reprogrammable.
Several programmable ROMs are commercially available, generally referred to as erasable programmable ROMs (EPROMs), including ultra-violet (UV) EPROMs and electrically erasable programmable ROMs (EEPROMs). UV EPROMs or the like require external access to the ROMs to be erased, possibly even removal from the computer system, and thus are not convenient for reprogramming purposes. EEPROMs are not necessarily desirable for system ROM purposes since they are very expensive and are generally erasable only one byte at a time.
Flash EPROMs, otherwise referred to as “bulk” EPROMs, are nonvolatile, random access and reprogrammable memory devices. The entire data contents of bulk EPROMs are erased through a simple flash erase operation. Flash EPROMs typically include an input pin for erase purposes, where a high voltage, such as +12 volts, applied to the erase input pin enables erasure. An erase command completes the erase procedure. Bulk EPROMs are relatively inexpensive, but are still not preferred for use as system ROMs since the entire data contents are erased during an erase procedure, including the primary boot code, which should remain intact.
A popular ROM device presently used to comprise system ROMs is referred to as block flash or simply block EPROMs. Block EPROMs are essentially bulk EPROMs which are divided into multiple portions, which may be individually erasable, or may otherwise include a portion which is not erasable. Thus, one portion is used to store the primary boot code, where this portion is either non-erasable or the erase capability for that portion is not enabled.
One such block EPROM, referred to as the boot block EPROM, such as the 28F001 manufactured by Intel, is a 128 kbyte EPROM comprising two portions having separate erase enable inputs, including a separate 8 kbyte erasable portion and a separate 120 kbyte erasable portion. Typically, the 8 kbyte portion is used to store the primary boot code, where its flash erasable function is disabled (or non-enabled) to prevent accidental erasure. This may be achieved by not connecting the erase enable input pin for this portion. The remaining 120 kbyte portion can be erased by asserting the erase enable input pin and supplying the appropriate commands, and then reprogrammed through software. Thus, enhancements or upgrades to the secondary boot code can readily be made without the threat of erasure of the primary boot code.
The popularity of block EPROMs, including the boot block EPROM by Intel, has caused shipment delays and access problems. Vendors have simply been unable to meet the demand, so that computer suppliers are unable to complete computer systems otherwise ready for shipment. It is desirable, therefore, to find alternative methods of providing similar functions performed by block and boot block EPROMs.
SUMMARY OF THE PRESENT INVENTION
A computer system according to the present invention uses readily available bulk or flash EPROMs to replace the block or boot block flash EPROMs typically used for the system ROM purposes. In a first embodiment for simpler systems using a single block or boot EPROM, a first bulk EPROM and a second ROM are used instead of the block EPROM. The primary boot code is stored in the second ROM, which is preferably an OTP ROM. Separate decode logic is provided to enable the second ROM and disable the bulk EPROM when the microprocessor attempts to access the primary boot code during power-up. The secondary boot code is stored in the bulk EPROM, which is erasable and programmable for subsequent fixes, enhancements or upgrades.
In an alternative embodiment for more complicated systems having a system ROM comprising a first block EPROM and a second bulk EPROM, the block EPROM is replaced with a bulk EPROM. The primary boot code is duplicated in both bulk EPROMs, preferably at mirrored locations. Selection logic is coupled to the microprocessor for receivin

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