Non-collapsing interconnection for semiconductor devices

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip

Reexamination Certificate

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Details

C257S738000, C438S616000

Reexamination Certificate

active

06222277

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to the general field of interconnection of semiconductor devices, more particularly to the interconnection of semiconductor devices to printed circuit boards without the introduction of mechanical stress from thermal cycling and such that the interconnection is non-collapsing in nature and has improved fatigue life. This invention also relates to the interconnection of a ball grid array to a printed circuit board.
BACKGROUND OF THE INVENTION
Semiconductor devices, such as, integrated circuits, chips, ball grid arrays, multi-chip modules and microelectronic packages are connected to one another via printed circuit boards. The term printed circuit board is used here in a generic sense and include all types of boards that hold chips and other electronic components. Typically, a printed circuit board is made of reinforced fiberglass or plastic and interconnects components via copper pathways. The main printed circuit board in a system is called a system board or motherboard, while smaller ones that plug into the slots in the main board are called boards or cards.
A semiconductor device generally has a planar surface with several contacts or leads arranged in a pattern. A printed circuit board generally has solder wettable contact pads having some solder deposited thereon and arranged in patterns that correspond to the pattern of contacts on the semiconductor devices to be mounted on the board. Typically, a semiconductor device is mounted on a printed circuit board by placing the device contact points on corresponding board contact pads and then subjecting the semiconductor device and printed circuit board combination to a thermal cycling process. The thermal cycling process first heats the solder to its liquidus temperature thereby causing the solder to flow, and then cools the solder to its solidus temperature thereby causing it to solidify so that a solder interconnection joint is formed and the device is attached to the board.
Generally, the semiconductor device and the printed circuit board are made of different materials. For example, the semiconductor device may be a plastic resin encapsulated ball grid array or a ceramic encapsulated ball grid array, whereas the printed circuit board may be made of an epoxy resin. These materials have significantly different coefficients of thermal expansions, which means that the materials expand and contract differently when heated or cooled over the same temperature range. Accordingly, using prior art interconnection methods as described above, when a printed circuit board and a semiconductor device combination is subject to thermal cycling for solder reflow, the board and the device expand and contract at different rates. This thermal mismatch caused by the difference in coefficient of thermal expansion generates a substantial amount of mechanical stress in the device, the board and the solder interconnection formed upon completion of the thermal cycling process. The mechanical stresses introduced into the solder interconnection causes fatigue within the solder interconnection resulting often in failure of the interconnection. Additionally, the thermal mismatch caused by the difference in coefficient of thermal expansion of the materials may cause the substrate to warp.
Also, during normal operation of a semiconductor device, the flow of current through the solder joints of the interconnection causes heat to be generated. The resulting heat causes the board and the device to expand and contract at different rates due to the difference in their respective coefficients of thermal expansion. This thermal mismatch caused by the difference in coefficient of thermal expansion generates a substantial amount of mechanical stress in the solder interconnection. The mechanical stresses introduced into the solder interconnection causes fatigue within the solder interconnection resulting often in failure of the interconnection.
Additionally, semiconductor devices, such as ball grid arrays have been getting larger and heavier as more and more functionality and circuitry are built into them. During the thermal cycling process to reflow the solder, the weight of the semiconductor device often causes the solder interconnect to collapse or semi-collapse and distort. Collapsed solder interconnects pose several processing problems and also often lead to shorting of adjacent pads of the printed circuit board. Additionally, a collapsed or distorted solder interconnection joint has built in mechanical stresses that produce fatigue in the solder joint and may result in failure of the solder joint.
Prior art methods have attempted to solve the problem of solder joint collapse and a high wattage solder joint requirement by using solder alloys that are harder and are hence better able to support the weight the of a heavy semiconductor device. However, the higher liquidus temperature of such alloys cause thermal degradation of the materials of the semiconductor device and the printed circuit board which are typically unable to withstand the higher temperatures.
Accordingly, there is a need for a semiconductor device and printed circuit board interconnection that does not collapse under the weight of the semiconductor device and is not subject to built in mechanical stresses caused by coefficient of thermal expansion mismatch of the materials from which the semiconductor device and the board is formed.
SUMMARY OF THE INVENTION
It has been an object of the present invention to provide a semiconductor device and printed circuit board interconnection that has minimal built in mechanical stress.
It has been another object of the present invention to provide a semiconductor device and printed circuit board interconnection that is able to withstand the weight of the semiconductor device and that does not collapse or fatigue as a result of thermal cycling.
These objects have been achieved in accordance with one aspect of the present invention by providing a semiconductor interconnect structure which includes a semiconductor substrate having a bottom surface. The semiconductor substrate may be a chip, a ball grid array, a multi-chip module, or the like. In addition to the semiconductor substrate the interconnect structure includes a printed circuit board underlying the semiconductor substrate which has a top surface and a bottom surface. The printed circuit board also has a plurality of solder wettable pads disposed on the top surface of the printed circuit board. The printed circuit board and the semiconductor substrate are both comprised of material taken from the same group of materials. The interconnect structure also includes a plurality of balls formed of a first solder alloy disposed on the bottom surface of the semiconductor substrate and projecting downwardly therefrom. Each one of the plurality of balls are sized to support the weight of the semiconductor substrate. The interconnect structure also includes a plurality of solder joints formed of a second solder alloy connecting the plurality of balls to the corresponding plurality of wettable pads on the printed circuit board. The first solder alloy has a liquidus temperature greater than the second solder alloy liquidus temperature, and the second solder alloy has a liquidus temperature suitable for use with the material comprising the printed circuit board and the semiconductor substrate. The material comprising the printed circuit board and the semiconductor substrate are thermally degradable at a temperature greater than the liquidus temperature of the second solder alloy and lesser than the liquidus temperature of the first solder alloy.
In accordance with another aspect of the present invention, a method for forming an interconnection attaching a semiconductor device to a printed circuit board includes the steps of providing a semiconductor device and attaching a first plurality of balls formed of a first solder alloy on the bottom surface of the semiconductor device whereupon the balls project downwardly therefrom, the first plurality of balls sized to be effec

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