Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1998-12-18
2001-07-03
Wojciechowicz, Edward (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S315000, C438S211000, C438S230000, C438S257000, C438S267000
Reexamination Certificate
active
06255691
ABSTRACT:
CROSS-REFERENCE TO THE RELATED APPLICATION
The entire disclosure of Japanese Patent Application No. Hei9-350738 filed on Dec. 19, 1997 including specification, claims, drawings and summary is incorporated herein by reference in its entirely.
1. Field of the Invention
This invention relates to a nonvolatile semiconductor memory device, in particular to the forming of an electrode and a tunnel insulation film partially having a thin film portion.
2. Prior Art
An EEPROM is conventionally known as a nonvolatile semiconductor device which can be switched between write and non-write states by transferring charges through a tunnel oxide film partially having a thin film portion. The manufacturing process for the EEPROM will be described in reference to FIG.
5
.
As shown in
FIG. 5A
, N
+
regions
5
and
7
are formed in a semiconductor substrate
2
using a resist (not shown).
Next, it is subjected to thermal oxidation and selective etching to form a tunnel window
13
a
as a thin film portion. After depositing a polysilicon layer over the entire surface by the CVD process, a resist is used to form a floating gate electrode
9
and a select gate
19
as shown in FIG.
5
C. After forming an ONO film and a polysilicon layer over the entire surface, a resist is used to form an ONO film
14
and a control gate electrode
29
as shown in FIG.
6
A. As shown in
FIG. 6B
, using the select gate electrode
19
and the control gate electrode
29
as masks, impurities are implanted into the substrate
2
. As a result, sources
3
and
6
, and a drain
4
of a memory transistor and a select transistor are formed in the semiconductor substrate
2
.
The manufacturing process described above, however, has the following problems: First, since separate masks are used to form the N
+
region
5
, the tunnel window
13
a,
and the floating gate electrode
9
, the size of a cell increases by the dimension for possible displacement of the masks. In other words, the conventional process cannot achieve minute dimensioning depending on the performance of the exposure device used.
If it is possible to reduce the size of the tunnel window
13
a,
minute dimensioning can be achieved without sacrificing the performance. The reason is as follows: If the size of the tunnel window
13
a
can be reduced, the floating gate electrode
9
can be made small while maintaining a coupling ratio. This makes it possible to reduce the cell size while maintaining a voltage applied to the tunnel oxide film relative to the voltage applied to the control gate electrode
29
. In other words, the cell size can be made minute while maintaining writing speed and the like.
DISCLOSURE OF THE INVENTION
The object of the invention is to provide a nonvolatile semiconductor memory device and its manufacturing process capable of solving the above problem, reducing the effective dimensions of the tunnel window, and achieving minute dimensioning without sacrificing its performance.
The nonvolatile semiconductor memory device comprises a semiconductor substrate, a first region provided in the semiconductor substrate, a second region provided so as to form a region capable of creating an electric channel between the first region, and the region capable of forming the electric channel, the first insulation film having a thin film portion of a thickness smaller on the first region than on the region capbale of forming the electric channel a floating electrode provided over the first insulation film to store electric charges, the floating electrode having a conductive side wall located over the thin film portion, and a main part located in the vicinity of the thin film portion and a main part located in the vicinity of the thin film portion and above the region capable of forming the electric channel, a lower region formed between the side wall and the main part being electrically isolated by an isolation laver and an upper region formed between the side wall and the main part being electrically connected by a conductive connection part a second insulation film provided on the floating electrode, and a control electrode provided on the second insulation film.
A nonvolatile semiconductor memory device comprises a semiconductor substrate of a first conductive type region formed in the semiconductor substrate, a second conductive type region formed in the semiconductor substrate, a tunnel oxide film formed on the first conductive type region comprising having a thin film portion over the second conductive type region, and a floating electrode capable of switching between write and non-write states by transferring electric charges to and from the second conductive type region through the thin film portion, the floating electrode comprises a conductive side wall located over the thin film portion, and a main part located in the vicinity of the thin film portion and above part of the tunnel oxide film, a lower region formed between the conductive side wall and the main part being electrically isolated by an isolation layer and an upper region formed between the conductive side wall and the main part being electrically connected by a conductive connection part.
A process for manufacturing a nonvolatile semiconductor memory device capable of switching between write and non-write states by transferring electric charges between the floating electrode and the second conductive type region of the first conductive type substrate through the thin film portion of the tunnel oxide film, comprises the steps of forming a main part of the floating electrode for storing electric charges on the insulation film formed on the substrate, partially removing the insulation film around the side wall of the floating electrode using the floating electrode as a mask, forming the oxide film of a specified thickness on the substrate surface where the insulation film has been removed, thereby forming the tunnel oxide film having the thin film portion, forming the conductive side wall on the side wall of the main part and the thin film portion, and partially removing the insulation layer formed between the main part and the conductive side wall, thereby electrically connecting between the conductive side wall and the upper region of the main part.
The features, other objects, applications, and effects of the invention will become clearer in reference to the embodiments and appended drawings.
REFERENCES:
patent: 5021848 (1991-06-01), Chiu
patent: 5-67790 (1993-03-01), None
Merhcant & Gould P.C.
Rohm & Co., Ltd.
Wojciechowicz Edward
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