Method of fabricating compound semiconductor devices using...

Details Method of fabricating compound semiconductor devices using... Method of fabricating compound semiconductor devices using...

1998-12-09

2001-03-20

Niebling, John F. (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having schottky gate

C438S577000, C438S578000, C438S579000, C438S576000, C438S574000

Reexamination Certificate

active

06204102

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the fabrication field of semiconductor devices, and more particularly to a method for forming a gate electrode of a compound semiconductor device using lift-off an insulating film.
2. Description of the Related Art
FIGS. 1
a
to
1
d
are cross-sectional views showing a method of fabricating a field effect type compound semiconductor devices, such as high electron mobility transistor (HEMT) or metal semiconductor field effect transistor (MESFET), according to a conventional method.
First, as shown in
FIG. 1
a
, a GaAs buffer layer
2
, a AlGaAs/GaAs superlattice buffer layer
3
, a channel layer
4
, a spacer layer
5
, a semiconductor layer
6
, and a n type GaAs ohmic contact layer
7
are successively grown on the semi-insulating GaAs substrate
1
.
Next, as shown in
FIG. 1
b
, a resist consisting of deposited polymethylmethacrylate (PMMA) and co-polymer is deposited by spin coating on the GaAs ohmic layer
7
. An electron beam irradiates the resist, which is developed to form a resist pattern having a T-type profile. The GaAs ohmic layer
7
is removed by dry etching using the resist pattern as a mask.
Next, as shown in
FIG. 1
c
, Ti/Pt/Au metal film
9
is deposited on the resist pattern
8
and semiconductor layer
6
. T-type gate electrode
10
is formed within the resist pattern
8
having a T-type profile.
Finally, as shown in
FIG. 1
d
, as the metal film deposited the inside and top of the resist pattern is simultaneously removed by lift-off method, T-type gate electrode
10
and GaAs ohmic layer
7
are exposed. sequentially, Ohmic metal (AuGe/Ni/Au) electrode
11
of source and drain are produced by evaporation, self-aligning, using the T-type gate electrode
10
as a mask. AuGe/Ni/Au films are formed to a thickness of 1000Å to 2000 Å, 400Å to 1000Å, and 400Å to 1000Å, respectively. Sequentially, the field effect type compound semiconductor devices, such as HEMT, MESFET is accomplished by rapid annealing at the temperature of 430° C. for 20 sec.
As described above, the conventional semiconductor device is formed a resist pattern having a T-type profile using PMMA and co-polymer, sequentially deposited a metal film for gate electrode. In the case of deposition of the refractory metal on the resist pattern having a T-type profile in order to form the gate electrode, the refractory metal gate electrode is difficult to form stably due to melting of the resist. Also, the T-type gate electrode of materials such as Ti/Pt/Au shows an unstable device characteristics due to its deterioration, thereby annealing at the high temperature, after forming by self-aligning method an ohmic metal electrode.
In the formation process by self-aligning method a source and drain using the T-type gate electrode as a mask, the device reliability decreases due to the interconnection between gate and ohmic metal electrodes, because the insulating film is not formed at a lower part of gate electrode.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a method of fabricating a compound semiconductor device using lift-off an insulating film capable of forming to be stabilize a gate electrode.
It is a further object of the present invention to provide a method of fabricating a compound semiconductor device using lift-off an insulating film capable of preventing to be deteriorate a gate electrode. Another object of the present invention is to provide a method of fabricating a compound semiconductor device using lift-off an insulating film capable of preventing to be interconnect between gate and ohmic metal electrodes.
In accordance with one aspect of the present invention, a method of fabricating a semiconductor device comprises the steps of: a first step having a semiconductor layer; a second step forming a first insulating film pattern having a first aperture which make exposed said semiconductor layer; a third step forming a second insulating film pattern having a second aperture on said first insulating film pattern, wherein said second aperture is connected with said first aperture, and the width of said second aperture is wider than said first aperture; a fourth step depositing a conductivity film on the entire structure after a third step, and forming a T-type gate electrode touched with said semiconductor layer, wherein said T-type gate electrode consist of conductivity film deposited the inside of said first and said second apertures; a fifth step removing said second insulating film; and a sixth step, forming a insulating spacer on a pole sidewall of the conductivity film consisting of said gate electrode, wherein said first insulating film is etched to be remain behind said pole sidewall of the conductivity film.
In accordance with another aspect of the present invention, a method of fabricating a semiconductor device comprises the steps of: a first step forming a first semiconductor layer; a second step forming a second semiconductor layer on the entire structure after said first step; a third step forming a first oxide film having a first aperture which make exposed said second semiconductor layer; a fourth step forming a nitride film pattern having a second aperture and second insulating film pattern having a third aperture, wherein said second and third apertures are connected with said first aperture, said first and second apertures respectively, the width of said second aperture is wider than said first aperture, and the width of said third aperture is wider than said second aperture; a fifth step exposing said first semiconductor by removing said semiconductor layer exposed by said first aperture; a sixth step depositing a conductivity film on the entire structure after said fifth step, and forming a T-type gate electrode touched with a first semiconductor layer which is exposed said forth step, wherein said T-type gate electrode consist of conductivity film deposited the inside of said first and said second apertures; a seventh step removing said second oxide and nitride patterns; and a eighth step forming a insulating spacer on a pole sidewall of the conductivity film consisting of said gate electrode, wherein said first insulating film is etched to be remain behind said pole sidewall of the conductivity film.


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