Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate
1998-07-07
2001-08-07
Chin, Wellington (Department: 2664)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
C370S474000, C370S516000, C375S226000, C375S371000, C348S497000
Reexamination Certificate
active
06272138
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to method and apparatus for reducing jitter or wander on internetworking between ATM network and PDH network, and more particularly relates to method and apparatus for reducing jitter or wander on internetworking between ATM network and PDH network interface by using a jitter absorber comprised of a First-In-First-Out (FIFO) buffer, and a clock smoother when recovering timing synchronization.
2. Related Art
Generally, ATM is a specific packet-oriented transfer mode using an asynchronous time division multiplexing technique where both line switching and packet switching are unified and many pieces of data information such as voice, video, and data are organized in fixed-sized packets, called cells each comprised of a data portion and a header portion for storing destination information needed to route the cell through the network at a constant bit rate. The operation of ATM networks is well known and so is the problem of jitter as disclosed, for example, in U.S. Pat. No. 5,287,347 for
Arrangement For Bounding Jitter In A Priority
-
Based Switching System
issued to Spanke, U.S. Pat. No. 5,274,680 for
Device For The Transmission Of Synchronous Information By An Asynchronous Network, Notably An ATM Network
issued to Sorton et al., U.S. Pat. No. 5,471,510 for
Asynchronous Transfer Mode Digital Telecommunication Network Terminal Equipment Synchronization Device
issued to Renault et al., U.S. Pat. No. 5,534,937 for
Minimum
-
Delay Jitter Smoothing Device And Method For Packet Video Communications
issued to Zhu et al., U.S. Pat. No. 5,563,884 for
Reducing Multiplex Jitter In An ATM/MPEG System
issued to Fimoff et al., and U.S. Pat. No. 5,640,388 for
Method And Apparatus For Removing Jitter And Correcting Timestamps In A Packet Stream
issued to Woodhead et al.
ATM network may be crossed connected with a plesiochronous digital hierarchy (PDH) network in the manner disclosed, for example, in U.S. Pat. No. 5,577,039 for
System And Method Of Signal Transmission Within A Plesiochronous Digital Hierarchy unit Using ATM Adaptation Layers
issued to Won et al., and assigned to the assignee of the instant application. A cross connection system for ATM and PDH data comprises a line interface unit, a multiplexer/demultiplexer, a plurality of ATM adaptation layer modules, a first stage cell multiplexer/demultiplexer, a second stage cell multiplexer/demultiplexer and a router. The ATM adaptation layer AAL
1
performs a segmentation and reassembly (SAR) function. At the transmission side, the ATM adaptation layer AAL
1
receives PDH digital signal level
3
(DS
3
) data and demultiplexes the same into 28 digital signal level
1
(DS
1
) data. ATM adaptation layer modules convert the 28 DS
1
data to ATM cell streams. The ATM cell streams are multiplexed into a single ATM MUX cell stream and then multiplexed with another cell stream. A router receives the combined multiplexed cell stream adds a header field, and outputs an ATM cell. At the receiving side, the ATM cell data is converted back to DS
3
PDH data using the same system components.
AAL
1
-SAR device is used to convert synchronous information of a PDH user into 4 bit synchronous information of an ATM cell stream for transmission via a network link. At the receiving side, the AAL
1
-SAR device extracts synchronous information for a PDH data stream in ATM cell streams and transmits the same to a timing recovery block for a transmission clock recovery. The timing recovery block recovers a transmission clock according to the DS
1
(1.544 Mbps) and E
1
(2.048 Mbps) line speed that includes delay jitter or wander. The jitter or wander represents a phase variation of a signal by noise and interference of a communication line, a variation of a circumference temperature or bit stuffing, etc. When the phase variation of a signal varies rapidly, jitter is generated. Likewise when the phase variation of a signal varies slowly, wander is generated. The jitter or wander can cause the loss of transmission data when reading data transmitted from a buffer or can cause a slip phenomenon wherein unreliable data is inserted among transmission data. However, in case that the timing recovery block generates a transmission clock having DS
1
or E
1
line speed, and the transmission clock includes a jitter or wander, such a jitter or wander can cause data error or false operation of overall network synchronization.
SUMMARY OF THE INVENTION
Accordingly, it is therefore an object of the present invention to provide a method for reducing jitter and wander on internetworking between ATM network and PDH network.
It is an another object of the present invention to provide an apparatus for reducing jitter and wander on internetworking between ATM network and PDH network using a jitter absorber comprised of a First-In-First-Out (FIFO) buffer, and a clock smoother when recovering timing synchronization.
These and other objects of the present invention can be achieved by an apparatus for reducing jitter and wander on internetworking between an ATM network and a PDH network. The apparatus includes a timing recovery unit which receives a system clock of the ATM network and divides the system clock to produce a reference clock and a first transmission clock related to the PDH network in order to recover a synchronized clock in the PDH network by using synchronized clock information of a PDH user in an ATM cell stream transmitted from the ATM network; a clock smoother which reduces jitter or wander contained in said first transmission clock and generates a second transmission clock; a segmentation and reassembly device which segments the ATM cell stream transmitted from the ATM network into a PDH data stream and transmits the PDH data stream to the PDH network, or reassembles the PDH data stream transmitted from the PDH network to an ATM cell stream, and receives the reference clock from the timing recovery unit and provides synchronous residual timing stamp codes related to synchronized clock information of the PDH user to the timing recovery unit and outputs the PDH data stream including jitter and wander according to said first transmission clock; a jitter absorber which receives the PDH data stream including jitter or wander, and reduces the jitter or wander generated in the segmentation and reassembly device and outputs the PDH data stream according to the second transmission clock a framer which receives the second transmission clock and the PDH data stream in which jitter or wander is reduced, and segments the PDH data stream transmitted from the PDH network into each time slot or reassembles the time slots into the PDH data stream.
In accordance with another aspect of the present invention, a method for reducing jitter and wander on internetworking between an asynchronous transfer mode (ATM) network and a plesiochronous digital hierarchy (PDH) network, comprising the steps of: (a) receiving a system clock of the ATM network and providing a reference clock and a first transmission clock in order to recover a synchronized clock in the PDH network by using a synchronized clock information of a PDH user in an ATM cell stream transmitted from the ATM network; (b) receiving the first transmission clock to reduce jitter or wander contained therein and generating a second transmission clock; (c) segmenting the ATM cell stream transmitted from the ATM network into a PDH data stream and transmitting the segmented PDH data stream to the PDH network, or reassembling the PDH data stream transmitted from the PDH network into the ATM cell stream and transmitting the reassembled ATM cell stream to the ATM network, and providing synchronous residual timing stamp codes and generating the PDH data stream including jitter or wander according to the first transmission clock; (d) receiving the PDH data stream including jitter or wander, and reducing the jitter or wander included in the PDH data stream and outputting the PDH data stream according to the second transmission clock; (e) receiving the secon
Bushnell , Esq. Robert E.
Chin Wellington
Samsung Electronics Co,. Ltd.
Tran Maikhanh
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