Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
1998-10-01
2001-07-17
Smith, Matthew (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C703S016000
Reexamination Certificate
active
06263484
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to the verification of, based on emulation, system-level digital circuits which have been designed; more particularly, relates to a prototyping system which implements rapidly a designed digital circuit in the same form of actual hardware with “Reusable Field Programmable Devices” (or chips) and other discrete devices and verifies the designed digital circuit in a short time, and to a method for operating the prototyping system.
2. Description of Prior Art
As technologies for the design of integrated circuits and the manufacture of semiconductor improve rapidly, the scale and complexity of digital circuit design has increased tremendously, and it has been possible to design and manufacture system-level digital circuits capable of implementing microprocessors, digital signal processors, memory devices, application specific logic circuits, etc. on a single chip. Meanwhile, since it becomes necessary to develop a new high quality product in a very short time in order to survive the vicious competition in the market, high-speed prototyping systems capable of implementing and verifying designed circuits effectively have become increasingly important.
Up to now, a logic simulator based on software has been used to verify the operation of designed digital circuits; however, the logic simulator is not absolutely reliable since it is based on software modeling in a virtual environment, not on implementing an actual circuit. The capability of simulation software and computer cannot affiliate the size and complexity of digital circuits to be verified. To overcome the shortcomings of the logic simulator and to verify a designed circuit more accurately, it has been developed a technology for verifying a designed circuit based on hardware emulation which is closer to the actual digital circuit and which technology is capable of verifying the designed circuit more accurately (hereinafter referred to as “Rapid Prototyping”). The verification of a designed digital circuit by using the “Rapid Prototyping” can be executed at high speed since it is executed by an actual hardware implementation. The verification of a designed digital circuit by using the “Rapid Prototyping” also allows the design verification to be performed in an environment close to the actual hardware. The verification process for a digital circuit design using this prototyping is such that verifying signals are applied at the input of hardware on where the designed circuit to be verified is implemented, and logic values appearing on many signal lines existing in the circuits including output lines are probed to see if they match the logic values intended by the designer by rigorously probing the signal lines.
Recently, “Reusable Field Programmable Devices” (hereinafter referred to as “RFPDs”) have been frequently used in industry, since any digital circuit can be implemented in the RFPDs by being simply programmed onto the devices, and further, due to the unlimited programmable number, the devices can be reused. There are several types of RFPDs such as a field programmable gate array, a complex programmable logic device, etc. In general prototyping systems based on emulation, the digital circuit to be verified is implemented in the prototyping engine which is composed by interconnecting several ten to several thousand RFPDs and other discrete devices such as microprocessors, digital signal processors, application specific non-memory devices or memories. The capacity of a prototyping system is determined based on an important factor, which is whether the prototyping system can provide solutions for the following problems. First, probing signal lines is inherently difficult since many signal lines existing within the digital circuits to be verified exist inside RFPDs; this problem becomes more serious when more highly integrated RFPDs are used. Second, in a circuit design using the so called “Intellectual Property” (hereinafter referred to as “IP”) which has begun to be used frequently in system-level designs, it is required that a variety of IPs can be used in convenience by the prototyping system, since the system uses different IPs to execute the verification of a designed circuit effectively. To solve this problem, a method for replacing the existing devices or boards into prototyping engine with devices or boards needed by a user or for newly adding the needed devices or boards should be provided. Third, the usage rate of RFPDs by the prototyping engine is very low when a digital circuit is implemented in the prototyping engine, since the number of pins of RFPDs cannot be increased proportionally regardless of increasing RFPDs' integration degree. Fourth, it is required that low integrated RFPDs used in conventional prototyping engine can be replaced with high integrated RFPDs with ease so as to increase the capability of the prototyping engine.
As a conventional prototyping system, for example, U.S. patent publication No. 5,452,231 has been disclosed, and the content of the publication is incorporated in this specification as a reference.
FIG. 38
is a schematic diagram of a conventional prototyping system. As shown in
FIG. 38
, in the conventional system, a conventional prototyping engine
8
is connected to a server computer
40
through an interface module
42
. In the prototyping engine
8
, a plurality of RFPDs 2 used for implementing logic gates and a plurality of RFPDs 4 which are used for connection are connected to an emulation system bus
6
, and the emulation system bus
6
is connected to a system interface bus
26
. To form the conventional prototyping engine (
8
), the RFPDs used in the prototyping engine are divided into two groups, RFPDs used for implementing logic gates and RFPDs used for interconnection of logic gates. The connection between the two groups is implemented in partial crossbar, where there is no direct connection between the RFPDs in the same group. This connection type can be a solution for the timing problems, which occur in logic emulation, but also causes other problems. In the conventional prototyping systems, other devices accept the RFPDs, such as microprocessors, digital signal processors and application specific non-memory devices cannot be used easily in the prototyping engine, and it is not easy to replace the RFPDs used in the prototyping engine with high integrated and high speed RFPDs. Further, in case that signal lines existing in a designed circuit to be verified exist also in certain RFPDs, real time probing is impossible, and too many RFPDs are needed in the emulation since the rate of using the resources in the RFPDs is too low due to the physical limitation of the number of input/output pins of each RFPD.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a prototyping system and a method for operating the prototyping system which would resolve the above mentioned problems. More specifically, it is an object of the present invention to provide a prototyping system capable of probing signal lines in designed system-level digital circuits in real time and an automated operating method for the system. It is another object of the present invention to provide a unique additional circuit for communication to the designed circuits to be verified which is designed by using various IPs in verifying the designed circuits by using the prototyping system with ease, and to use various semiconductor devices such as RFPDs, memories, microprocessors, digital signal processors, application specific non-memory devices, etc. and/or circuit boards using these semiconductor devices with ease in the prototyping engine for fast and effectively verifying a system-level digital circuit. The additional communication circuit of the present invention provides consistent and seamless interface, which makes more systematic and hierarchical connection possible. It is a further object of the present invention to increase the usage rate of RFPDs in the prototyping engine even with the
Kik Phallaka
Senniger Powers Leavitt & Roedel
Smith Matthew
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