Carriers including projected contact structures for engaging...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Configuration or pattern of bonds

Reexamination Certificate

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C257S784000, C257S797000, C257S737000, C257S738000, C257S779000, C257S773000, C257S782000, C257S618000, C257S449000, C257S734000, C257S778000, C257S692000, C029S842000, C029S846000

Reexamination Certificate

active

06291897

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to apparatus and methods for making temporary contact with bumped semiconductor devices. More specifically, the invention relates to contact structures having non-planar or raised surfaces formed to reduce deformation of solder balls on bumped dice when engaged by such contact structures.
2. State of the Art
Semiconductor devices are subjected to a series of test procedures in order to ensure quality and reliability. The testing procedures conventionally include “probe testing” in which individual integrated circuits (ICs), while still on the wafer, are initially tested to determine functionality and speed. Probe cards and other test heads are used to electrically test ICs at the wafer level by making electrical connection interfaces with a single IC at a time. If the wafer has a yield of ICs which indicates that the quality and quantity of functional ICs is likely to be good, the individual ICs are singulated or “diced” from the wafer with a wafer saw. Each individual die may be assembled in a package to form an IC device or may be bumped with solder (usually prior to separation from the wafer) for direct flip-chip bonding to a semiconductor substrate.
In many semiconductor applications, formation of conductive bumps on the bond pads of an IC die is necessary or desirable. The most common applications where conductive bumps are used include tape automated bonding (TAB), flip-chip attachment of a die to a carrier substrate, such as a printed circuit board (PCB) (i.e., chip-on-board (COB) chip scale packages). Formation of the conductive bumps used in these applications can be accomplished using a variety of commonly known methods, such as metal deposition onto bond pads by screening or printing, or ball bumping techniques using wire bonding equipment.
A widely practiced way to increase the number of available input/output (I/O) connections is to use flip-chip methodology for packaging where an array of connection elements is positioned on the active surface of the die and the die is mounted active surface down upon a single-chip or multi-chip substrate (i.e., a chip or module carrier) and bonded to the terminal pads of the substrate through the connection elements.
One method of flip-chip attachment is controlled collapsed chip connection (C
4
), pioneered by International Business Machines Corp. during the 1960s. In C
4
bonding, an array of solder bumps, corresponding to an array of contacts, connects the flipped die to the single-chip or multi-chip carrier substrate such as a PCB. The single-chip or multi-chip structure may subsequently be packaged and mounted to higher-level packaging such as a mother board or chassis. Many variations of the original C
4
technology are practiced in the art to produce metallic, reflowable balls.
Because of the high manufacturing costs associated with state-of-the-art metal deposition techniques, many semiconductor manufacturers have resorted to ball bumping processes using standard wire bonding tools to form conductive bumps over the bond pads. In the ball bumping process, a capillary of the wire bonding tool carries a conductive wire toward a bond pad on which a bump is to be formed. A ball is formed at an end of the wire by heating and melting the metal wire. The wire bonding tool capillary then presses the ball against the planar bond pad and the portion of the wire extending past the ball is cut, leaving a ball bump on the bond pad.
Various materials are typically used to form the bumps on the die, such as solder, gold, conductive polymers, etc. Typically, if the bumps are solder bumps, the solder bumps are deposited, reflowed to form a spherical shape, and subsequently re-heated to form a solder joint between the bond pads on the so-called flip-chip and the carrier substrate terminal pads, the solder joint forming both electrical and mechanical connections between the flip-chip and carrier substrate. U.S. Pat. No. 5,426,266 to Brown et al. discloses a connection for flip-chip mounting a “bumped” IC die directly to a semiconductor substrate in which a circuit run having an end that is formed into a patterned bond pad lies directly underneath the bond pad of the die. The patterned bond pad of the circuit run includes cutout areas that form a metallization pattern of conductive ridges and expose portions of the underlying substrate. A gold, indium or copper bump of the die is compressed into the cutout portions between the ridges of the patterned bond pad, thus mechanically interlocking the metal bump with the patterned bond pad at the end of the circuit run. Accordingly, significant deformation of the metal ball results.
Dice destined for flip-chip attachment are often tested after having been “bumped” (i.e., forming solder or other metal balls on the bond pads of the die) by contacting and usually penetrating, to some degree, the solder balls with needle-like probes. Such tests may include full functional testing where the operation of the unpackaged die is evaluated, burn-in testing where various performance parameters may be tested while changing environmental conditions such as temperature, voltage and current, and various other tests. A typical probe is a pointed needle-like element of small size (significantly smaller in diameter than the solder ball diameter) that penetrates the solder ball, piercing any oxidation layer present on the outside of the solder ball and making good electrical contact with the underlying metal. An exemplary probing device is disclosed in U.S. Pat. No. 5,532,613 to Nagasawa et al., which includes a probe needle having a pointed or conical tip. Another probe structure having a linearly-extending serrated tip is disclosed in U.S. Pat. No. 5,428,298 to Ko. Penetration of the solder ball by the probe typically gouges, pits and deforms the solder ball, creating closed cavities on the bottom center surface thereof such that the probed solder balls must be reflowed to return the solder ball to its pre-probed shape (i.e., substantially spherical) prior to connection of the die to the carrier substrate. Without such a preliminary reflow, organics and other contaminants may be trapped between the face of the solicited bump and substrate terminal pad after connection, or trapped, heated gas may form a bubble at the connection site, reducing the mechanical strength of the bond and impairing the ohmic contact between the bond pad of the die and the terminal pad of the substrate. Although the bumps can be reshaped after testing by reflowing the solder, such reshaping is an unnecessary and hazardous expense that subjects the dice to an additional heating step that can adversely affect the operation and performance of the IC.
While probe needles provide one type of probe tip, other probe tips are also known in the art. One such probe tip, disclosed in U.S. Pat. No. 5,585,282 to Wood et al. and assigned to the assignee of the present invention, includes a contact member having raised portions thereon used to penetrate and make electrical contact directly with bond pads or bumped bond pads of a die. In U.S. Pat. No. 5,592,736 to Akram et al., also assigned to the assignee of the present invention, contacts having sharpened elongated projections are employed to make penetrating contact with the solder balls of bumped bond pads. While such probe or contact structures make good electrical contact with the solder balls, the bottom center of the solder balls may be significantly deformed by the contact, forming closed cavities in the bottoms of the balls which may trap organics and other contaminants if a preliminary reflow is not performed to reform the balls prior to die-to-carrier substrate interconnection. Furthermore, the aforementioned structures do not easily accommodate measurable differences in the heights of different bumps of balls on the active surface of a die.
Another approach to interconnection of bumped semiconductive devices for testing purposes or permanent inclusion in an electrical circuit is disclosed in U.S. Pa

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