Method of fabricating metal interconnect having inner air...

Details Method of fabricating metal interconnect having inner air... Method of fabricating metal interconnect having inner air...

2000-02-29

2001-05-08

Nguyen, Tuan H. (Department: 2813)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S619000, C438S421000, C438S303000, C438S595000

Reexamination Certificate

active

06228763

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application serial no. 89102690, filed Feb. 17, 2000.
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to a method of fabricating a semiconductor device. More particularly, the present invention relates to a fabrication method for a metal interconnect having an inner air spacer, applicable to multilevel interconnect technologies.
2. Description of Related Art
In order to build an integrated circuit, it is necessary to fabricate many active devices on a single substrate. Initially, each of the devices must be electrically isolated from the others, and specific devices must subsequently be interconnected in fabrication sequence so as to implement the desired circuit function, such as processing data in a microprocessor.
The data processing capability of the microprocessor has been extended to respond to more powerful and sophisticated program software, while such extension inevitably requires an increase in the operation speed of a metal oxide semiconductor (MOS) device. The operation speed of the MOS device is increased by creating an environment having a low dielectric constant between adjacent metal lines in a multilevel interconnect structure, while such environment is essential for reducing a cross-talk error and a capacitance between the metal lines. Since air was known to have a very low dielectric constant (about 1), an optimal dielectric constant for reduction of cross-talk and adverse capacitive coupling in polysilicon and metal interconnect, an air gap structure formed between the metal lines has been adopted in most interconnect process. As a result, the circuit speed is improved and logical cross-talk errors are avoided.
FIGS. 1A and 1B
are schematic diagrams illustrating a conventional method of fabricating the air gap structure.
Referring to
FIG. 1A
, a dielectric layer
100
is provided above a device layer (not shown), wherein the dielectric layer
100
has metal plugs
102
formed therein. Metal lines
104
are formed on the dielectric layer
100
to cover the metal plugs
102
. As a result, the metal lines
104
are not in direct contact with the metal layer (not shown) below the dielectric layer
100
, except through the metal plugs
102
in order to prevent an electrical short.
Referring to
FIG. 1B
, an inter-metal dielectric (IMD) layer
106
is formed to cover the metal lines
104
and the dielectric layer
100
by a method, such as plasma enhanced chemical vapor deposition (PECVD). The IMD layer is usually made of material, such as silicon dioxide, due to its low dielectric constant (about 3.9). According to the method taught by such prior art, one skilled in the art would expect to form a void or air gap
108
between two adjacent metal lines
104
, as shown in FIG.
1
B. However, the air gap
108
formed as such, does not effectively reduce the dielectric constant between the metal lines
104
. Moreover, the air gap
108
can only be formed between metal lines
104
that are in a denser distribution. Therefore, other materials, such as hydrogen silsesquioxane (HSQ) which provides a lower dielectric constant (about 2.9-3.0) and offers a better topographical planarity is needed to reduce the dielectric constant between the metal lines.
However, when HSQ is applied to interconnect technology, particularly for gap filling, it was found that its dielectric constant became undesirably high as a result of subsequent processing. For example, after the deposition of the silicon oxide layer by PECVD, the dielectric constant of the deposited HSQ layer undesirably increased from about 2.9 to about 3.6. This rise in dielectric constant is believed to be a result of the oxidation of the top surface of the HSQ due to exposure to an oxygen-containing ambient at an elevated temperature. The undesirable increase in the dielectric constant of the HSQ layer adversely impacts the intrametal capacitance and, therefore circuit speed.
SUMMARY OF THE INVENTION
The invention provides a metal interconnect structure having an inner air spacer between metal interconnects, applicable to multilevel interconnect technologies, and a fabrication method thereof.
As embodied and broadly described herein, the invention provides an inner air spacers, which is formed adjacent to sidewall of a metal layer in a dual damascene structure. The inner air spacer is formed as an air recess adjacent to the metal layer and are delineated by a metal layer, a second dielectric layer, and a third dielectric layer on the first dielectric layer.
According to one aspect of the present invention, a fabrication method for a metal interconnect structure having an inner air spacer between metal interconnects is provided. A first dielectric layer is formed on a MOS device layer, followed by forming an anti-reflection coating (ARC) layer on the first dielectric layer. The first dielectric layer and the ARC layer are patterned to form a contact opening, which contact opening is filled with a metal plug. A second dielectric layer is formed on the metal plug and the ARC layer. The second dielectric layer is then patterned to form a trench opening before forming dielectric spacers on sidewalls of the trench opening. A metal layer is formed to fill the trench opening, and the metal layer outside the trench opening is removed by chemical mechanical polishing (CMP). The second dielectric layer and the dielectric spacer are removed to expose the metal layer with curve-in edges before forming a third dielectric layer on the metal layer. As a result, the inner air spacers are formed as voids between the curve-in edges of the metal layer and the third dielectric layer.
Since the inner air spacer is formed closely adjacent to the metal layer, the dielectric constant between the metal interconnects is significantly reduced. The inner air spacer formed as above is also compatible with other dielectric materials to achieve the objective of reducing the dielectric constant. Furthermore, the inner air spacers can be formed on the sidewalls of the metal layers that are located wider apart. Thus, this ensures a uniform reduction of the dielectric constant between the metal interconnects and improves the circuit speed.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.


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