Direct memory access controller

Details Direct memory access controller Direct memory access controller

1998-09-01

2001-04-17

Shin, Christopher B. (Department: 2100)

Electrical computers and digital data processing systems: input/

Input/output data processing

Direct memory accessing

C710S120000

Reexamination Certificate

active

06219724

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a direct memory access controller, specifically to a direct memory access controller which controls the direct memory access between internal modules and high speed external memories such as SDRAM(Synchronous Dynamic RAM) in high speed digital signal processors having burst transmission feature.
2. Description of the Prior Art
Referring to
FIG. 1
a
and
FIG. 1
b
, the prior art direct memory access scheme of multimedia processors having parallel processing structure using a plurality of processing modules and high speed external memories such as SDRAM for image compression/decompression will be explained.
FIG. 1
a
is a diagram of the prior art fly-by type direct memory access control scheme which is used in IBM compatible computers. In the fly-by type scheme, the direct memory access controller
1
applies address and control signal to the target memory
3
and at the same time sends control signals to the input/output device
2
. The input/output device
2
has an input/output structure which complies to the direct memory access request signal
5
and the direct memory access response signal
6
and in which the address signal is ignored.
FIG. 1
b
is a diagram of the prior art flow-through type direct memory access scheme which is used in Intel 80186 processors. In the flow-through type scheme, the direct memory access controller has the same interface as that of the general CPU, and uses two input/output actions, i.e. writing the data from the read action is stored in a temporary memory
4
in the direct memory access controller
1
, and then write action is performed to transmit data.
In the fly-by type scheme, there is no delay in burst transmission because data is transmitted while the memory
1
and the input/output device
2
is connected directly. But, an additional interface for direct memory access transmission in the input/output device
2
is required.
The flow-through type has a simple interface but requires twice of transmission cycles compared to the fly-by type. Further, it requires a temporary memory as long as the length of the burst to be connected to the burst memories like SDRAM which is operated at the same speed as the system bus.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a direct memory access controller which can be used in multimedia processors which process data in parallel using a plurality of processing modules at the same time for the image compression/decompression.
The direct memory access controller according to the present invention comprises a plurality of direct memory access controller circuits, a direct memory access bus arbiter, and a direct memory access bus bridge connecting a direct memory access master bus and a direct memory access slave bus and providing a data transmission path between external high speed memories and input/output devices according to a signal from the direct memory access controller which is connected to the master bus.


REFERENCES:
patent: 5590377 (1996-12-01), Smith
patent: 5621902 (1997-04-01), Cases et al.
patent: 5623697 (1997-04-01), Bland et al.
patent: 5623700 (1997-04-01), Parks et al.
patent: 5717873 (1998-02-01), Rabe et al.
patent: 5802269 (1998-09-01), Poisner et al.
patent: 5875351 (1999-02-01), Riley
patent: 5878239 (1999-03-01), Furuta
patent: 5884051 (1999-03-01), Schaffer et al.
patent: 5963717 (1999-10-01), Imamura
patent: 5991304 (1999-11-01), Abramson
patent: 6000043 (1999-12-01), Abramson
patent: 6088517 (2000-07-01), Wanner et al.

Affiliated with

Also associated with

Rating

Direct memory access controller does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Direct memory access controller, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Direct memory access controller will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2461067