Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
1997-12-15
2001-08-07
Smith, Matthew (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
06272669
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates, in general, to semiconductor devices, and more particularly, to programmable semiconductor devices.
Programmable semiconductor devices such as Application Specific Integrated Circuits (ASICs), Field Programmable Analog Arrays (FPAAs), and Field Programmable Gate Arrays (FPGAs) are programmed with configuration data to either initialize or alter their configuration and operation. High level design languages such as a Hardware Description Language (HDL) are commonly used to aid in configuring programmable semiconductor devices. A drawback of using high level design languages is that they do not contain the configuration data required for directly programming a programmable semiconductor device. Typically, methods for deriving low level configuration data from high level design languages include using a compiler or a layout program. These methods are computer implemented processes for converting design data of high level design languages to configuration data. A disadvantage of these methods is the possibility of errors associated with these processes. An example of a possible error is a layout error that can negatively affect the operation of a programmable semiconductor device.
Accordingly, it would be advantageous to have a method for configuring a programmable semiconductor device that eliminates processes for deriving configuration data from high level design languages. It would be of further advantage for the method to be reliable and cost efficient.
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Anderson David J.
Anderson Howard C.
Bersch Danny A.
Marcjan Cezary
Hightower Robert F.
Motorola Inc.
Siek Vuthe
Smith Matthew
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