Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1994-05-27
2001-07-31
Quach, T. N. (Department: 2814)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S653000, C438S656000, C438S663000
Reexamination Certificate
active
06268290
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention concerns a method of forming wirings. The present invention can be utilized as a method of forming metal wirings, for example, in electronic materials (such as semiconductor device).
2. Description of the Prior Art
Wiring structures, for example, wirings for semiconductor devices such as LSI in the prior art are sometimes formed by forming films at a high temperature. For instance, Al series materials have often been used in view of their low resistivity and easy fabricability, and Al series alloys have been generally used therefor. The Al series alloys have usually been formed by a sputtering method, in which sputtering under heating, so-called, a high temperature sputtering method has also been used.
Among the Al series alloys, Si-containing alloy materials such as Al—Si or Al—Si—Cu have often been used with an aim of preventing penetration of Al in a portion of contact with a Si diffusion layer in a case where the underlying material is a silicon substrate. That is, Si-containing Al alloys comprise about 1 wt % of Si and, by incorporating Si in an amount generally greater than the solid solubilization limit (for example, 1 wt %) in Al, diffusion of Si from the Si substrate into Al in the portion of contact is prevented thereby suppressing Al from intruding into the Si substrate.
As the size of the LSI devices has become finer in recent years, the size and the shape of a wiring width and a connection hole have been also, in which a problem of Si nodules has become serious in view of the reliability of the wirings. That is, since the width of wirings is reduced in a portion in which Si nodules occur in the wirings, it may be a worry of wiring disconnection due to increase of wiring resistivity or local increase in the current density. FIG.
26
(
a
), (
b
) and FIG.
27
(
a
), (
b
) show Al—Si wiring
30
in which Si nodule
14
occurs. As can be seen from cross sectional views of FIG.
26
(
b
) and FIG.
27
(
b
), as well as from
FIG. 28
corresponding to
FIG. 25
, a Si nodule
14
occurs biting into the wiring
30
to reduce the wiring width in a portion shown by a reference numeral
15
.
On the other hand, it has been known that the size and the number of Si nodules depend particularly on the heating temperature for a substrate upon forming a Al alloy film or heat treatment after the formation of the film such as Al sintering. In view of the above, it has been attempted to reduce the Si nodules by improving and optimizing the heating processes, thereby suppressing the undesired effect on the reliability. However, the Si nodules can not completely be eliminated after all by such a method. With the reasons as described above, there has been demanded for a drastic countermeasure capable of completely suppressing the occurrences of the Si nodules also in a case in which Al—Si is used as the Al series material.
Further, the foregoing problem may arise in any of the cases in the technique for forming wirings by film formation of a Si-containing metal layer.
OBJECT OF THE INVENTION
The present invention has been accomplished in view of the foregoing problems and it is an object thereof to provide a technique for forming wirings or high reliability by preventing occurrence of Si nodules in a case of forming wirings by a Si-containing metal layer.
SUMMARY OF THE INVENTION
The foregoing object can be attained in accordance with first aspect of the present invention concerning a method of forming wirings which comprises forming a film of a silicon-containing metal layer at a high temperature on an underlying metal, thereby forming a silicon alloy layer comprising the underlying metal and the silicon-containing metal.
The foregoing object can be attained in accordance with the second aspect of the present invention concerning a method of forming wirings as defined in the first aspect, wherein the silicon-containing metal layer is formed from a silicon-containing aluminum series material and the silicon-containing metal layer is formed by a high temperature sputtering.
The foregoing object can be attained in accordance with the third aspect of the present invention concerning a method forming wirings as defined in the first aspect, which comprises forming a film of a silicon-containing metal layer on an underlying metal and, subsequently, applying a heat treatment, thereby forming a silicon alloy layer comprising the underlying metal and the silicon-containing metal.
The foregoing object can be attained in accordance with the fourth aspect of the present invention concerning a method of forming wirings as defined the third aspect, wherein the silicon-containing metal layer is formed by sputtering.
The foregoing object can be attained in accordance with the fifth aspect of the present invention concerning a method of forming wirings as defined in the third or fourth aspect wherein the silicon-containing metal layer is formed from a silicon-containing aluminum series material.
The foregoing object can be attained in accordance with the sixth aspect of the present invention concerning a method of forming wirings as defined in any one of third to fifth aspects, wherein the heat treatment is applied by furnace annealing.
The foregoing object can be attained in accordance with the seventh aspect of the present invention concerning for a method of forming wirings as defined in any one of third to fifth aspects, wherein the heat treatment is applied by a RTA method.
The foregoing object can be attained in accordance with the eighth aspect of the present invention concerning a method of forming wirings as defined in any one of third to seventh aspects, wherein the heat treatment is continuously applied in vacuum after forming the film of the silicon-containing metal layer.
The foregoing object can be attained in accordance with the ninth aspect of the present invention concerning a method of forming wirings as defined in any one of the first to eighth aspects, wherein the underlying metal is a Ti series material.
The present invention has a great advantageous effect in a case where the silicon-containing metal layer is an aluminum series material, for example, Al—Si alloy and Al—Si—Cu alloy. Further, it is preferably applied in a case where the underlying metal is a Ti series material, for example, Ti and/or TiON or TiW.
In the first aspect of the present invention, film formation at a high temperature means that the silicon-containing metal is formed into a film by being heated in a molten or nearly molten state and that the film is formed, preferably, at a temperature higher than 150° C., more preferably, higher than 200° C. and, usually, from 400 to 500° C.
REFERENCES:
patent: 4154874 (1979-05-01), Howard et al.
patent: 4673623 (1987-06-01), Gardner et al.
patent: 4783248 (1988-11-01), Kohlhase et al.
patent: 4810342 (1989-03-01), Inoue
patent: 4816424 (1989-03-01), Watanabe et al.
patent: 4910580 (1990-03-01), Kuecher et al.
patent: 4976839 (1990-12-01), Inoue
patent: 5036382 (1991-07-01), Yamaha
patent: 5071791 (1991-12-01), Inoue et al.
patent: 5108570 (1992-04-01), Wang
patent: 5108951 (1992-04-01), Chen et al.
patent: 5117276 (1992-05-01), Thomas et al.
patent: 5270254 (1993-12-01), Chen et al.
patent: 0168828 (1986-01-01), None
patent: 54-6461 (1979-01-01), None
patent: 58-101454 (1983-06-01), None
patent: 61-90445 (1986-05-01), None
patent: 62-113421 (1987-05-01), None
patent: 59-210656 (1987-11-01), None
Ho, P., et al., “Sputtered Metallurgy Process . . . ”, IBM Tech. Disc. Bull., vol. 21, No. 11, Apr. 1, 1979. pp. 4527-4528.*
Wolf, S., et al., Silicon Processing, vol. 1, 1986, Lattice Press, pp. 56-58.*
Wolf et al., Silicon Processing, vol. 1, Lattice Press, 1986, pp. 365-374.*
Ghandhi, VLSI Fabrication Principles, John Wiley & Sons, 1983, pp. 427-429.*
Hoffman et al., Solid State Technology, Feb. 1981, pp. 105-111.
Maeda Keiichi
Taguchi Mitsuru
Quach T. N.
Sonnenschein Nath & Rosenthal
Sony Corporation
LandOfFree
Method of forming wirings does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of forming wirings, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming wirings will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2457137