Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Wire contact – lead – or bond
Reexamination Certificate
1999-10-12
2001-05-15
Clark, Sheila V. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Wire contact, lead, or bond
C257S773000, C257S698000, C257S048000, C257S727000
Reexamination Certificate
active
06232669
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to a contact structure for establishing electrical contact with contact targets such as pads, electrodes, or leads of electronic circuits or devices, and more particularly, to a contact structure having beam like (silicon finger) contactors thereon and a total stack-up structure using the contact structure to be used as an interface assembly for testing semiconductor wafers, packaged semiconductor devices, IC chips, printed circuit boards and the like, with a higher speed, frequency range, density and quality.
BACKGROUND OF THE INVENTION
In testing high density and high speed electrical devices such as LSI and VLSI circuits, high performance contact structures such as probe contactors must be used for forming an interface assembly between a test system and a device to be tested. The contact structure of the present invention is not limited to the application of testing, including burn-in testing, of semiconductor wafers and die, but is inclusive of testing and burn-in of packaged semiconductor devices, printed circuit boards and the like. The feature of the present invention can also be used in more general applications including an IC lead, IC packaging, and other electrical connections. However, for the convenience of explanation, the present invention is described mainly with reference to the semiconductor wafer testing.
In the case where semiconductor devices to be tested are in the form of a semiconductor wafer, a semiconductor test system such as an IC tester is usually accompanied with a substrate handler, such as an automatic wafer prober, to automatically test the semiconductor wafer. Such an example is shown in
FIG. 1
in which a semiconductor test system has a test head
100
which is ordinarily in a separate housing and is electrically connected to the main frame of the test system with a bundle of cables. The test head
100
and the substrate handler
400
are mechanically connected with one another with the help of a manipulator
500
driven by, for example, a motor
510
.
The semiconductor wafers to be tested are automatically provided to a test position of the test head
100
by the substrate handler
400
. The resultant output (response) signals from IC circuits on the semiconductor wafer under test are transmitted to the semiconductor test system wherein they are compared with expected data to determine whether the IC circuits on the semiconductor wafer function correctly.
FIG. 2
shows, in more detail, a structure of the substrate handler (wafer prober)
400
, the test head
100
and an interface assembly
140
when testing a semiconductor wafer. The test head
100
and the substrate handler
400
are connected with an interface assembly
140
consisting of a performance board, pogo-pin block, probe card, and other components. The performance board
120
of
FIG. 2
is a printed circuit board having electric circuit connections unique to a test head's electrical footprint, coaxial cables, pogo-pins and connectors.
The test head
100
includes a large number of printed circuit boards
150
which correspond to the number of test channels or test pins. Each of the printed circuit boards has a connector
160
to receive a corresponding contact terminal
121
of the performance board
120
. A “frog” ring (pogo-pin block)
130
is mounted on the performance board
120
to accurately determine the contact position relative to the substrate handler
400
. The frog ring
130
has a large number of contact pins
141
, such as ZIF connectors or pogo-pins, connected to contact terminals
121
on the performance board
120
, through coaxial cables
124
.
As shown in
FIG. 2
, the test head
100
is placed over the substrate handler
400
and mechanically and electrically connected to the substrate handler through the interface assembly
140
. In the substrate handler
400
, a semiconductor wafer
300
to be tested is mounted on a chuck
180
. A probe card
170
is provided above the semiconductor wafer
300
to be tested. The probe card
170
has a large number of probe contactors or contactors (such as cantilevers or needles)
190
to contact with circuit terminals or contact targets in the IC circuit of the semiconductor wafer
300
under test.
Electrical terminals or contact receptacles of the probe card
170
are electrically connected to the contact pins
141
provided on the frog ring
130
. The contact pins
141
are also connected to the contact terminals
121
of the performance board
120
with coaxial cables
124
where each contact terminal
121
is connected to the printed circuit board
150
of the test head
100
. Further, the printed circuit boards
150
are connected to the semiconductor test system through the cable
110
having several hundreds of inner cables.
Under this arrangement, the probe contactors
190
contact the surface of the semiconductor wafer
300
on the chuck
180
to apply test signals to the semiconductor wafer
300
and receive the resultant output signals from the wafer
300
. The resultant output signals from the semiconductor wafer
300
under test are compared with the expected data generated by the semiconductor test system to determine whether the semiconductor wafer
300
performs properly.
FIG. 3
is a bottom view of the conventional probe card
170
of FIG.
2
. In this example, the probe card
170
has an epoxy ring on which a plurality of probe contactors
190
called needles or cantilevers are mounted. When the chuck
180
in the semiconductor wafer prober
400
mounting the semiconductor wafer
300
moves upward in
FIG. 2
, the tips of the cantilevers
190
contact the pads or bumps on the wafer
300
. The ends of the cantilevers
190
are connected to wires
194
which are further connected to transmission lines (not shown) formed in the probe card
170
. The transmission lines are connected to a plurality of electrodes
197
which contact the pogo pins
141
of FIG.
2
.
Typically, the probe card
170
is structured by a multi-layer of polyimide substrates having ground planes, power planes, signal transmission lines on many layers. As is well known in the art, each of the signal transmission lines is designed to have a characteristic impedance such as 50 ohms by balancing the distributed parameters, i.e., dielectric constant and magnetic permeability of the polyimide, inductances and capacitances of the signal paths within the probe card
170
. Thus, the signal lines are impedance matched lines establishing a high frequency transmission bandwidth to the wafer
300
for supplying currents in a steady state as well as high current peaks generated by the device's outputs switching in a transient state. For removing noise, capacitors
193
and
195
are provided on the probe card between the power and ground planes.
An equivalent circuit of the probe card
170
is shown in
FIG. 4
to explain the limitation of the high frequency performance in the conventional probe card technology. As shown in
FIGS. 4A and 4B
, the signal transmission line on the probe card
170
extends from the electrode
197
, the strip (impedance matched) line
196
, the wire
194
and the needle or cantilever (contact structure)
190
. Since the wire
194
and needle
190
are not impedance matched, these portions function as an inductor L in the high frequency band as shown in FIG.
4
C. Because of the overall length of the wire
194
and needle
190
is around 20-30 mm, significant limitations will be resulted from the inductor when testing a high frequency performance of a device under test.
Other factors which limit the frequency bandwidth in the probe card
170
reside in the power and ground needles shown in
FIGS. 4D and 4E
. If the power line can provide large enough currents to the device under test, it will not seriously limit the operational bandwidth in testing the device. However, because the series connected wire
194
and needle
190
for supplying the power (
FIG. 4D
) as well as the series connected wire
194
and needle
190
for grounding the power and signals (
FIG. 4E
Frame James W.
Khoury Theodore A.
Advantest Corp.
Clark Sheila V.
Muramatsu & Associates
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