Method of protecting gate oxide

Details Method of protecting gate oxide Method of protecting gate oxide

1998-12-16

2001-08-14

Niebling, John F. (Department: 2812)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C483S064000, C483S064000, C483S064000

Reexamination Certificate

active

06274494

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates in general to a method of protecting gate oxide, and more particularly, to a method of protecting gate oxide by forming a protection layer.
2. Description of the Related Art
In the conventional method of fabricating a gate of a metal-oxide semiconductor (MOS), a very thin gate oxide layer is formed on a semiconductor substrate. A polysilicon layer on the gate oxide layer is formed for the formation of a gate electrode. A gate is thus formed and comprises the gate oxide layer and the gate electrode. To achieve the interconnection, a dielectric layer is formed on the gate as an isolation layer between the gate and a metal layer formed subsequently. While more than one metal layer is required for interconnection, a dielectric layer is formed between every two consecutive metal layers. The dielectric layer between two metal layers is called an inter-layer dielectric layer (ILD) or inter-metal dielectric layer (IML).
During the formation of the dielectric layer, the metal layer, and the inter-metal dielectric layers, a plasma process is often performed. The particles contained in the plasma may penetrate the dielectric layer to damage the gate oxide layer. In addition, an intensive light, including ultra-violet light or other short wavelength light, is generated during plasma etching. These short wavelength lights may transmit through the dielectric layer or inter-metal dielectric layer to further damage the gate oxide layer.
For a semiconductor device with a line width of deep sub-micron, the quality of a gate oxide layer is a crucial factor to determine the quality of a device. As the thickness of a gate oxide layer is typically thinner than 100 Å, the gate oxide layer is easily to be damaged. Once the gate oxide layer is damaged, the yield of produce is degraded.
FIG. 1
shows a conventional fabrication method of interconnection which damages the gate oxide layer.
In
FIG. 1
, after the formation of a gate oxide layer
102
on a substrate
100
, and a gate electrode layer
104
on the gate oxide layer, a dielectric layer
106
is formed to cover the gate electrode
104
and the substrate
100
. A anisotropic plasma etching is performed to remove a part of the dielectric layer
106
, so as to form a contact window (not shown). The charged particles
110
contained in the plasma penetrate through the dielectric layer
106
to damage the gate oxide layer
102
. An intensive light with a short wavelength generated by the plasma etching process may transmit through the dielectric layer
106
to impinge the gate oxide layer
102
. The intensive light has a high energy to induce electron-hole pairs in the gate oxide layer
102
. As a consequence, the quality of the gate oxide layer
102
is deteriorated.
SUMMARY OF THE INVENTION
It is an object of the invention to provide a method of protecting gate oxide. By this method, the damage caused by the particles contained in the plasma and the generated light to result a degraded yield of products is prevented.
To achieve the above-mentioned objects and advantages, a method of protecting gate oxide is provided. On a substrate having a gate thereon, a dielectric layer is formed. The gate comprises a gate oxide layer on the substrate, and a gate electrode on the gate oxide layer. A thin conductive layer is formed on the gate as a protection layer for the subsequent plasma etching process.
By the protection of the thin conductive layer, the particles contained in the plasma and the light generated by the plasma are blocked from penetrating through. The damage caused in the conventional method is prevented. As a consequence, the quality of the gate oxide layer is not deteriorated, and the yield of the products is maintained.
Both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.


REFERENCES:
patent: 4892843 (1990-01-01), Schmitz et al.
patent: 5837557 (1998-11-01), Fulford, Jr. et al.
patent: 5936300 (1999-08-01), Sasada et al.
patent: 6069069 (2000-05-01), Chooi et al.

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