Radiation imagery chemistry: process – composition – or product th – Imaging affecting physical property of radiation sensitive... – Post imaging radiant energy exposure
Reexamination Certificate
1999-08-18
2001-05-08
Letscher, Geraldine (Department: 1752)
Radiation imagery chemistry: process, composition, or product th
Imaging affecting physical property of radiation sensitive...
Post imaging radiant energy exposure
C430S312000, C430S313000, C430S314000, C430S394000, C430S396000, C430S945000
Reexamination Certificate
active
06228564
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to methods of patterning photoresist, and more particularly to methods for combining precision and non-precision photolithography processes to pattern photoresist.
BACKGROUND OF THE INVENTION
Photolithography is used to transfer specific patterns onto semiconductor devices or integrated circuits during the fabrication process. A masking step transfers the pattern of a photomask onto a photoresist layer on the device surface by exposing the photoresist through the mask. Selected areas of the photoresist, based on the pattern of the mask, are then etched so that subsequent process steps, such as impurity introduction, oxidation, and metallization, can be performed. A semiconductor device with the desired electrical properties is then obtained after several of these application-specific masking and processing steps.
For example, a custom or application specific-integrated circuit (ASIC), frequently used to implement new circuit designs, may require several different custom masks during the fabrication process since each layer of the device needs to be specifically patterned. Because precision custom masks are costly to manufacture, a large quantity of each integrated circuit (IC) type must be produced in order for the fabrication process to be economical. However, as technology advances, circuit designs become more application-specific and are typically required at a much lower volume than the more generic ICs, thus making fabrication of such application-specific ICs more expensive per unit.
In an attempt to reduce the costs per unit of ASICs, a current practice is to use gate arrays to customize integrated circuits in order to minimize the number of different custom configuration mask steps. Gate arrays are mass-produced integrated circuits containing generic arrays of circuit elements (“gate array blanks”), which can be customized into application-specific ICs with a small number of masks defining custom interconnections of the circuit elements at the final steps of fabrication. The gate array blanks can be manufactured up to the customization steps and stored away until an order for a particular application-specific circuit is received. A precision configuration mask is then used to customize the specific gate arrays. However, the high costs of precision configuration masks limit the extent that costs and lead-time of ASICs manufacturing can be reduced.
An alternative method is to use direct write-on-wafer technology on gate array processing to replace the steps requiring custom configuration masks. However, using programmable direct-write machines can still incur substantial costs to the manufacture of prototype and production ASICs. Electron beam (E-beam) direct-write technology employs high-cost equipment with a low throughput. On the other hand, laser-based direct-write systems do not have the resolution needed to meet the performance and total die size requirements of present designs. Even though less expensive than E-beam systems, laser based systems are still more expensive and of lower precision than standard optical reduction steppers or other comparable methods using a standard set of precision photomasks.
Accordingly, it is desirable to pattern photoresist so that fabricating customized integrated circuits can be accomplished without the drawbacks of conventional methods in order to reduce both lead-time and costs of designing and manufacturing ASICs.
SUMMARY OF THE INVENTION
According to the present invention, a method is provided for patterning photoresist by combining precision and non-precision lithography without the need of a precision configuration mask, thereby reducing costs, complexity, and lead-time for fabricating an application specific integrated circuit (ASIC). A standard precision mask or another precision technique (hereinafter referred generally as “mask”) is first used to define all possible patterns on the photoresist for a selected application or user. The photoresist is then customized using a non-precision technique to select the desired patterns defined by the precision mask. Thus, the precision mask controls the feature size, while the non-precision step selects which features are desired.
In one embodiment of the present invention, negative photoresist on a wafer surface is patterned to create desired openings in the photoresist. The resist is exposed through a standard precision photomask in all areas except where all possible openings will exist, and thus, the size, location, and shape of the possible openings are determined by the precision mask. A laser direct-write machine or other non-precision direct-write technique (hereinafter referred generally as “laser”) is then used to expose areas, typically larger than the previously created photomask possible openings, which are not to be subsequently acted upon. The resist is then developed to uncover the desired openings which were not exposed by either the mask or laser, i.e., the logical NOR of the mask's clear and transparent areas and the laser exposures. The device may then be etched or acted upon through these desired resist openings.
In another embodiment, positive resist is patterned to create desired openings in the photoresist. The resist is exposed at all possible openings through a mask, which defines the size and shape of the possible openings. However, the time and energy of the mask exposure is kept below the threshold for complete exposure of the resist, which is generally referred to as the clearing energy of the resist. A laser then exposes locations on the resist overlapping areas where openings are desired. The time and energy of the laser exposure is insufficient to fully expose the resist by itself, but is sufficient when combined with the mask exposure step. The resist is then developed to uncover openings exposed by both the mask and laser, i.e., the logical AND of the two exposure steps. The device can then be etched or acted upon based on the resist pattern.
In another embodiment of the present invention, positive resist is patterned with lines and specific locations of potential cut points for disconnecting the lines. The resist is exposed through a standard mask to define lines (unexposed) and spaces (exposed). A laser then exposes selected cut points within the lines and the resist is developed to uncover areas exposed by the mask or the laser, i.e., a logical OR of the mask's clear and transparent areas and laser exposures. The device may then be etched or acted upon accordingly.
Another embodiment of the present invention patterns negative resist with lines and possible connection points between lines. The resist is exposed through a mask to define lines (exposed) where the resist is to cover the structure and gaps (unexposed) where the resist is to be removed. A laser exposes additional areas between lines where resist is desired to cover the structure, creating selected additional connections between lines. The resist is developed and areas of the resist left unexposed by the mask or laser are removed for a logical OR of the mask's clear and transparent areas and laser exposures. Etching or other processing can then be performed on the patterned resist.
In another embodiment of the present invention, two resist layers are patterned. A first layer of positive or negative resist is deposited on the device. The first layer is exposed through a mask (with corresponding changes in the mask polarity depending on the resist polarity) to define the dimensions of the pattern. The resist is then developed to remove the desired resist areas. A second layer of resist (positive or negative) is applied over the first resist and portions of the device uncovered by the previous mask exposure. A laser (with corresponding changes to the write pattern depending on the resist polarity) selects the portions on the second resist layer, which are then developed to uncover the desired areas of the device for etching or other processing.
In the above embodiments, a laser is used to select the desired patterning. H
Chen Tom
Clear Logic
Letscher Geraldine
Skjerven Morrill & MacPherson LLP
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