Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Recessed oxide by localized oxidation
Reexamination Certificate
2000-09-22
2001-07-31
Tran, Andrew (Department: 2824)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Recessed oxide by localized oxidation
C438S443000, C438S479000
Reexamination Certificate
active
06268268
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device comprising an SOI (silicon on insulator or semiconductor on insulator) substrate in which a device isolation region is formed.
2. Description of Related Art
SOI substrates have conventionally been used for manufacturing semiconductor devices. On a surface silicon layer which comprises the SOI substrate, a device isolation film is formed to penetrate the surface silicon layer for isolation of the semiconductor devices.
For example, Japanese Unexamined Patent Publication No. HEI 9(1997)-298195 discloses a semiconductor device as shown in FIG.
4
(
g
) utilizing the SOI substrate.
The semiconductor device comprises an SOI substrate
20
including a silicon substrate
21
, a buried insulating film
22
and a surface silicon layer
23
. Active regions for an N-channel transistor and a P-channel transistor are formed in the surface silicon layer
23
and electrically isolated from each other by a device isolation region. Source/drain regions for the N-channel transistor and the P-channel transistor are also formed in the active regions. Gate electrodes are formed on the surface silicon layer via a gate insulating film, and a silicon nitride film and an interlayer insulating film are formed to cover the gate insulating film, the gate electrode and the device isolation region. Through holes down to the source/drain regions are formed in the silicon nitride film and the interlayer insulating film so that connection with upper wirings can be provided.
Such a semiconductor device is manufactured in the following manner.
As shown in FIG.
3
(
a
), a silicon nitride film
24
is formed on the surface silicon layer
23
on the SOI substrate
20
, and then the silicon nitride film
24
is selectively removed from a region for device isolation. Using the silicon nitride film
24
as a mask, the surface silicon layer
23
is thermally oxidized to obtain a first LOCOS oxide film
25
.
Then, as shown in FIG.
3
(
b
), the first LOCOS oxide film
25
is selectively removed to form a groove
26
in the surface silicon layer
23
.
Then, as shown in FIG.
3
(
c
), a silicon nitride film
27
is selectively formed on the sidewalls of the groove
26
and the thermal oxidization is performed again. The surface silicon layer
23
at the bottom of the groove
26
is partially oxidized to form a second LOCOS oxide film, i.e., a device isolation region
28
. The thermal oxidization completely oxidizes the surface silicon layer
23
at the bottom of the groove
26
, so that the bottom of the device isolation region
28
contacts the top surface of the buried insulating film
22
. The device isolation region
28
electrically divides the surface silicon layer
23
into two active regions. Thereafter, the silicon nitride film
24
used as the mask is selectively removed to form a gate insulating film
29
over the active regions.
Next, as shown in FIG.
3
(
e
), a polycrystalline silicon film containing P-type or N-type impurities is formed on the gate insulating film
29
and patterned into gate electrodes
30
. Then, as shown in FIG.
3
(
f
), ion implantation to the active regions is carried out to form source/drain regions
31
in each of the active regions, and a silicon nitride film
32
is formed over the entire surface of the SOI substrate.
Then, as shown in FIG.
3
(
g
), an interlayer insulating film
33
and through holes
34
are formed so that connection with upper wirings can be obtained.
As described above, the semiconductor device according to the prior art forms the active regions that are electrically isolated from each other by performing two LOCOS oxidization steps on the surface silicon layer
23
.
The first LOCOS oxidization is performed to reduce the thickness of the surface silicon layer
23
at the bottom of the device isolation region
28
so that the height of silicon island regions surface made of the surface silicon layer
23
and that of the device isolation region
28
surface to be formed later can be adjusted to be flat. Further, through the first LOCOS oxidization, the edges of the silicon islands are formed in a round shape to prevent the generation of parasitic MOS.
The second LOCOS oxidization is carried out to form the silicon nitride film
27
on the sidewalls of the groove
26
as an oxidization resistive mask so as to prevent the formation of bird's beak. Further, the oxidization is intended to relax stress by performing it at high temperature (up to 1100° C.).
In the above manufacturing method of the semiconductor device, the purposes of the first and second LOCOS oxidization steps are described, but the thicknesses of the first and second LOCOS oxide films are not mentioned.
The relaxation of the stress and the thickness of the second LOCOS oxide film are significantly related. A thick second LOCOS oxide film will increase the stress applied around it, and eventually induce crystal defects in the surface silicon layer. This may cause leakage of the obtained transistors.
SUMMARY OF THE INVENTION
The present invention has been achieved to solve the above-mentioned drawbacks and intends to provide a method of manufacturing a semiconductor device in which the stress caused around the device isolation region is reduced and the yield of the dielectric strength of the source/drain regions of the transistor is improved.
The present invention provides with a method of manufacturing a semiconductor device comprising the steps of: (a) forming a first oxide film and a first silicon nitride film on a surface semiconductor layer of an SOI substrate, the SOI substrate comprising the surface semiconductor layer formed on a support substrate with the intervention of a buried insulating film; (b) patterning the first silicon nitride film into a desired shape and performing a first LOCOS oxidization using the thus patterned first silicon nitride film as a mask to form a first LOCOS oxide film in a region for device isolation in the surface semiconductor layer; (c) selectively removing the first LOCOS oxide film, (d) forming sidewall spacers of a second silicon nitride film on sidewalls of the first silicon nitride film and the first oxide film; (e) performing a second LOCOS oxidization using the first silicon nitride film and the sidewall spacers as a mask to form a second LOCOS oxide film which is thinner than the first LOCOS oxide film; and (f) removing the first and second silicon nitride films.
These and other objects of the present application will become more readily apparent from the detailed description given hereinafter. However, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description.
REFERENCES:
patent: 6096583 (2000-08-01), Iwamatsu et al.
patent: 9-298195 (1997-11-01), None
Nixon & Vanderhye P.C
Sharp Kabushiki Kaisha
Smith Bradley
Tran Andrew
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