Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor
Reexamination Certificate
1999-04-15
2001-05-08
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
Field-effect transistor
C326S098000, C326S083000
Reexamination Certificate
active
06229341
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to improvements in semiconductor integrated circuits operating in synchronization with a clock signal, including such a large-scale integrated circuit as a microprocessor or signal processor. More particularly, it relates to a circuit and method for driving the clock signal or the like with low power consumption.
BACKGROUND OF THE INVENTION
Conventional technology for transmitting a clock signal in a semiconductor integrated circuit has imparted the clock signal with a full amplitude on the level of a power-source voltage corresponding to the difference between the power-source voltage and the ground voltage, since static operation is required of a receiving circuit for receiving the clock signal so that the output from the receiving circuit is varied based on the potential change of the clock signal.
With a large-scale chip, the following measures have been taken to minimize a clock skew resulting from a wiring delay (RC delay) so that the clock signal as a synchronization signal changes with the same timing at any portion on an entire chip:
(1) The width of a signal line is increased to reduce the influence of wiring resistance on the clock signal.
(2) Large-size drivers are distributed over the chip.
However, since the amplitude voltage of the clock signal conventionally used in the semiconductor integrated circuit has had the full amplitude on the level of the power-source voltage, power consumption for driving the clock signal is increased disadvantageously.
In the case of increasing the width of the signal line as mentioned in the foregoing measure (1), the wiring resistance may be reduced but the large-size drivers become necessary because of increased wiring capacitance. Therefore, each of the foregoing measures (1) and (2) has the drawback of increased power consumption for driving the clock signal, since the power for driving the drivers is increased.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to reduce the power consumption for driving the clock signal.
To attain the above object, the amplitude voltage of the clock signal may be adjusted to be extremely small but, in that case, the receiving circuit of conventional structure cannot operate statically any more.
The present invention provides a receiving circuit which can operate statically in response to the potential change of a clock signal to be transmitted even when the clock signal has an extremely small amplitude voltage, a driving circuit for driving the clock signal compatible with the receiving circuit, a semiconductor integrated circuit using the structure of the receiving circuit for receiving the clock signal, and a method of controlling the semiconductor integrated circuit.
To summarize the principle of the present invention, a pair of differential clock signals are differentially transmitted to be received by the gate and source electrodes of a transistor so that, when the potentials of the differential signals change, respective potentials at the gate and source electrodes of the transistor shift in opposite directions. This enables the transistor to operate statically with a potential difference double the potential difference between the differential clock signals. The present invention has been achieved by utilizing the static operation.
To attain the above object, the present invention provides a signal transmitting circuit for transmitting a signal to a signal receiving circuit, comprising: a differential-signal generating portion for expressing the signal as a pair of differential signals having potentials shifting in opposite directions, the potential of one of the differential signals being a potential at a power source of the signal receiving circuit; and a pair of lines for differentially transmitting the differential signals generated from the differential-signal generating portion.
The present invention provides a signal receiving circuit comprising a transistor, the signal receiving circuit receiving a pair of differential signals having potentials shifting in opposite directions, wherein respective potentials at at least two of a source electrode, a gate electrode, and a substrate electrode of the transistor change in synchronization with the change of the differential signals.
The present invention provides a signal transmitting method comprising: expressing a signal to be transmitted as a pair of differential signals having respective potentials shifting in opposite directions, the potential of one of the differential signals being a potential at a power source of a signal receiving circuit, and transmitting the differential signals.
The signal transmitting method of the present invention further comprises: receiving a signal having a first amplitude voltage; and converting the received signal to a pair of differential signals having a second amplitude voltage smaller than the first amplitude voltage which is based on the potential at the power source of the signal receiving circuit and transmitting the differential signals.
The present invention provides a signal receiving method comprising receiving a pair of differential signals having potentials shifting in opposite directions at any two of a source electrode, a gate electrode, and a substrate electrode of a transistor.
The present invention provides a signal transmitting/receiving method comprising: expressing a signal to be transmitted as a pair of differential signals having potentials shifting in opposite directions, the potential of one of the differential signals being a potential at a power source of a signal receiving circuit, and transmitting the differential signals; and receiving the transmitted differential signals at any two of a source electrode, a gate electrode, and a substrate electrode of a transistor.
The present invention also provides a signal transmitting circuit for transmitting a signal to a signal receiving circuit, comprising: a first differential-signal generating portion for expressing the signal as a pair of differential signals having potentials shifting in opposite directions, the potential of one of the differential signals being a potential at a power source of the signal receiving circuit; a second differential-signal generating portion for expressing the signal as the pair of differential signals, the potential of one of the differential signals being the ground potential; and two pairs of lines for differentially transmitting the two pairs of differential signals generated from the first and second differential-signal generating portions.
The signal transmitting method of the present invention further comprises: receiving a signal having a first amplitude voltage; converting the received signal to a pair of differential signals having a second amplitude voltage smaller than the first amplitude voltage which is based on a value in the vicinity of the potential at the power source of the signal receiving circuit; converting the received signal to a pair of differential signals having a third amplitude voltage smaller than the first amplitude voltage which is based on a value in the vicinity of the ground potential; and transmitting the pair of differential signals having the second amplitude voltage and the pair of differential signals having the third amplitude voltage.
The present invention also provides a signal receiving method comprising: receiving only a first pair of differential signals having a small amplitude voltage based on a voltage in the vicinity of a potential at a predetermined power source of a signal receiving circuit and a second pair of differential signals having a small amplitude voltage based on a voltage in the vicinity of a potential at a ground power source of the signal receiving circuit and outputting a third amplitude voltage larger than the respective amplitude voltages of the first and second pairs of differential signals by statically responding to electric changes of the first and second pairs of differential signals.
The present invention provides a signal transmitting/receiving
Matsushita Electric - Industrial Co., Ltd.
McDermott & Will & Emery
Paik Steven S.
Tokar Michael
LandOfFree
Signal transmitting circuit, signal receiving circuit,... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Signal transmitting circuit, signal receiving circuit,..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Signal transmitting circuit, signal receiving circuit,... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2443417