Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1998-12-23
2001-03-27
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S618000
Reexamination Certificate
active
06207560
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device. More particularly, the present invention relates to a dual damascene method for manufacturing a multilevel metal interconnect with a thin film resistor.
2. Description of the Related Art
Dual damascene is a technique that the via plugs and the wire are formed in the same step. The dual damascene comprises the steps of forming an insulating layer on the substrate and planarizing the insulating layer. The insulating layer is patterned to formed trenches and via holes for predetermined wire and via plugs respectively. The trenches and the via holes are filled with conductive material to form wires and via plugs.
The resistor is one of the most common electrical components widely used in almost every electrical device. A semiconductor device, mostly an integrated circuit, including memories and logical devices normally consists of resistors and other electrical components. The resistance provided by a resistor is proportional to the length of the resistor and the reciprocal of the cross-sectional area of the resistor; both are measured in the direction of the current. That is, the resistance of a resistor fulfills the following equation:
R
=
ρ
L
A
,
Wherein &rgr; is the resistivity of the resistor, L and A are the length and the cross-sectional area of the resistor respectively, and wherein both L and A are measured in the direction of the current.
Conventionally, doped polysilicon is used as the material of a resistor in a semiconductor fabrication process, wherein the resistance is controlled by predetermined L and A of the doped polysilicon layer.
As the integration of a semiconductor device is increased, all components within a semiconductor integrated circuit have to provide equivalent or better electrical properties. Hence, a downsized resistor still has to provide a required resistance. However, a conventional resistor made of doped polysilicon can only provide a limited resistance within a limited space because of the property of polysilicon. Using polysilicon resistor to provide a relatively high resistance then becomes a problem in designing and fabricating a highly integrated semiconductor device.
For overcoming the foregoing problem, new materials like CrSi having a higher resistivity than what of polysilicon are applied on the fabrication of a thin-film resistor of a highly integrated semiconductor device.
FIGS. 1A through 1E
are schematic, cross-sectional views of the conventional process for manufacturing a thin-film resistor.
As shown in
FIG. 1A
, a substrate
100
having an insulating layer
102
is provided. A CrSi layer
104
is formed on the insulating layer
102
. An aluminum layer
106
is formed on the CrSi layer
104
. The aluminum layer
106
is used to prevent the CrSi layer
104
from being damaged by the sequential dry etching process.
As shown in
FIG. 1B
, an aluminum layer
106
a
is formed by patterning the aluminum layer
106
.
As shown in
FIG. 1C
, an etching step is used to remove portions of the CrSi layer
104
exposed by the aluminum layer
106
a.
The remaining CrSi layer is denoted by
104
a.
A via hole
110
is formed by patterning the insulating layer
102
. The remaining insulating layer is denoted by
102
a.
A conductive layer
112
is formed over the substrate
100
and fills the via hole
110
.
As shown in
FIG. 1D
, a wire
112
a
and a via plug
110
a
are formed by patterning the conductive layer
112
.
As shown in
FIG. 1E
, the aluminum layer
106
a
is removed to expose the surface of the CrSi layer
104
a.
Even though the aluminum layer is capable of protecting the CrSi layer from the damages caused by dry etching processes, the provided protection is limited. Normally, the CrSi layer still get damaged by the dry etching process even in the presence of the aluminum layer if more than two dry etching processes are performed. Moreover, the conventional procedure is so complicated that the costs are high.
SUMMARY OF THE INVENTION
It is therefore an objective of the invention provides a dual damascene method of manufacturing an interconnect with a thin-film resistor to prevent the thin-film resistor from plasma damage due to subsequent processes.
It is another an objective of the invention which provides a dual damascene method of manufacturing an interconnect with a thin-film resistor to reduce the costs.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides a dual damascene method for manufacturing a multilevel metal interconnect with a thin film resistor. A substrate is provided. An insulating layer is formed on the substrate. A dual damascene structure is formed in the insulating layer. A thin film resistor layer is formed over the substrate and the thin film resistor layer is patterned to form a thin film resistor. Since dual damascene technique is performed before the thin-film resistor is formed, it can prevent the thin-film resistor from plasma damage caused by dry etching processes. Furthermore, it is unnecessary to form an aluminum layer on the thin-film resistor, thus, the procedure can be simplified and the costs can be reduced.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 5946567 (1999-08-01), Weng et al.
patent: 6051369 (2000-04-01), Azuma et al.
patent: 6063711 (2000-05-01), Chao et al.
patent: 6110648 (2000-08-01), Jang
Dang Phuc T.
Nelms David
United Microelectronics Corp.
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