Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1999-06-29
2001-04-17
Mintel, William (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S291000, C257S292000, C257S443000, C257S446000, C438S066000
Reexamination Certificate
active
06218691
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to an image sensor; and, more particularly, to a CMOS (Complementary Metal Oxide Semiconductor) image sensor with improved dynamic range by applying a negative voltage to a unit pixel.
DESCRIPTION OF THE PRIOR ART
Generally, a CMOS image sensor is an apparatus that converts an optical image into electrical signals using MOS (Metal Oxide Semiconductor) transistors. A CCD (Charge Coupled Device) image sensor, as a king of image sensor, is widely known. As compared with the CCD image sensor, the CMOS image sensor may be easily driven with various scanning schemes and integrated with a signal processing circuit on one-chip. Therefore, the CMOS image sensor may be miniaturize in size and, consequently, a reduction in the fabricating cost and the power consumption may be realized using a compatible CMOS technology.
Referring to
FIG. 1
, a conventional unit pixel of a CMOS image sensor is composed of a pinned photodiode (PPD) and four NMOS transistors. The four NMOS transistors include a transfer transistor
102
for transferring photoelectric charges generated in a pinned photodiode to a sensing node, a reset transistor
104
for resetting the sensing node in order to sense a next signal, a drive transistor
106
that functions as a source follower and a select transistor
108
outputting data to an output terminal in response to an address signal.
The reset transistor
104
and the transfer transistor
102
are made up of a native NMOS transistor so that charge transfer efficiency is improved. The native NMOS transistor has about a zero threshold voltage, which helps prevent electron losses from being generated that would otherwise occur for transistors having a positive threshold voltage. A load transistor
110
which is positioned between an output terminal (OUT) of the unit pixel and the group voltage level, receives a biasing signal from an external device and is used to bias the unit pixel. A capacitance of a floating diffusion is referred to as “C
fd
”.
Referring to
FIG. 2
, the conventional unit pixel of the CMOS image sensor includes a P
+
silicon substrate
201
, a P-epi (epitaxial) layer
202
, a P-well region
203
, field oxide layers
204
, a gate oxide layer
205
, gate electrodes
206
, an N
−
diffusion region
207
, a P
0
diffusion region
208
, an N
+
diffusion region
209
and oxide layer spacers
210
. A pinned photodiode (PPD) has a PNP junction structure in which the P-epi
202
, the N
−
diffusion region
207
and the P
0
diffusion region
208
are stacked. The P-epi layer
202
, to which the ground voltage level is applied, is formed on the P
+
silicon substrate
201
. Since a voltage of the P
+
silicon substrate
201
is fixed to the ground voltage level and a voltage variation range of the floating diffusion is limited, a voltage variation range of the output terminal of the unit pixel is very small. So, there is a problem that dynamic range of the unit pixel is also limited.
Since a power supply V
DD
of the unit pixel is 2.5V, 3V or 5V in a sub-micron CMOS technology and a voltage of the pinned photodiode is fixed to the ground voltage level, a pinning voltage, which fully depletes the N
−
diffusion region
207
of the pinned photodiode, should be at 0V or between a punch-through voltage of the transfer transistor
102
and the power supply V
DD
. When the pinning voltage is very high, it is difficult for the photoelectric charges to be fully transferred to the floating sensing node in the power supply of 3.3V. That is, when the charge transfer efficiency becomes very low, a charge capacity becomes very small and the quantum efficiency is depreciated.
As a result, since the charge transfer efficiency and the quantum efficiency have a trade-off relation to each other, it is difficult for both of them to be individually and independently optimized.
On the other hand, a voltage variation range represents a voltage sensitivity and decides the dynamic range of the output terminal of the unit pixel. However, since the conventional unit pixel may not increase the voltage variation range, the dynamic range of the output terminal of the unit pixel is substantially limited.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide an image sensor that is characterized by an improved output dynamic range and respectable charge transfer and quantum efficiencies the quantum efficiency on a best condition.
In accordance with an aspect of the present invention, there is provided an image sensor, comprising: a semiconductor substrate of a first conductivity type: a peripheral circuit formed on a first region of the semiconductor substrate, wherein a ground voltage level is applied to the first region; a unit pixel array having a plurality of unit pixels formed on a second region of the semiconductor substrate, wherein the first region is isolated from the second region and wherein a negative voltage level is applied to the second region; and a negative voltage circuit configured to provide the negative voltage for the second region.
REFERENCES:
patent: 4877951 (1989-10-01), Muro
patent: 5360987 (1994-11-01), Shibib
patent: 5466962 (1995-11-01), Yamamoto et al.
patent: 5587596 (1996-12-01), Chi et al.
patent: 5608243 (1997-03-01), Chi et al.
patent: 5920092 (1999-07-01), Watanabe
patent: 401135184 (1989-05-01), None
patent: 410209422 (1998-08-01), None
Chung In Sool
Kim Seong Dong
Hyundai Electronics Industries Co,. Ltd.
Mintel William
Townsend and Townsend / and Crew LLP
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