Interconnect and resistor for integrated circuits

Details Interconnect and resistor for integrated circuits Interconnect and resistor for integrated circuits

1992-07-09

1994-09-20

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 60, 437192, 437193, 437200, H01L 21205, H01L 21285

Patent

active

053489012

ABSTRACT:
A method is provided for forming a polycrystalline silicon resistive load element of a semiconductor integrated circuit, and an integrated circuit formed according to the same. A lightly doped first conductive layer having a conductivity of a first type. A first oxide layer is formed over the integrated circuit with a first opening therethrough exposing a portion of the first conductive layer. Using the first oxide layer as a mask, the exposed portion of the first conductive layer is then implanted with a dopant of a second conductivity type to form a junction between the exposed portion and the portion covered by the mask. A second oxide region is then formed on a portion of the first oxide layer in the first opening, over the junction and over a portion of the exposed first conductive layer adjacent to the junction. A silicide is formed over the exposed portion of the first conductive layer.

REFERENCES:
patent: 4450470 (1984-05-01), Shiba
patent: 4916507 (1990-04-01), Boudou et al.
patent: 4948747 (1990-08-01), Pfiester
patent: 4975575 (1990-12-01), Ito
patent: 5107322 (1992-04-01), Kimura

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