Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Patent
1996-07-11
1998-12-01
Swann, Tod R.
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
711113, 711114, 711167, 711220, G06F 1200
Patent
active
058453148
ABSTRACT:
A data transmission apparatus including a plurality of buffers for sequentially receiving individual data to be stored in a plurality of memories at every predetermine period and storing supplied data for a predetermined period, a plurality of latch circuits for receiving storage address data of data shifted at every predetermined period and holding supplied storage address data for a predetermined holding period from a time point at which storage address data are supplied, a write timing generator for write-activating a plurality of memories at its memory in which data held in each buffer is to be stored, and a read timing generator for read-activating a memory corresponding to a latch circuit to which storage address data is supplied after a predetermined delay time since storage address data was supplied.
REFERENCES:
patent: 4149239 (1979-04-01), Jenkins et al.
patent: 5396596 (1995-03-01), Hashemi et al.
patent: 5579500 (1996-11-01), Sekibe et al.
patent: 5603002 (1997-02-01), Hashimoto
patent: 5611069 (1997-03-01), Matoba
Frommer William S.
Namazi Mehdi
Smid Dennis M.
Sony Corporation
Swann Tod R.
LandOfFree
Data storage apparatus, data reading apparatus and data transmis does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Data storage apparatus, data reading apparatus and data transmis, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Data storage apparatus, data reading apparatus and data transmis will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2403662