High voltage NMOS pass gate having supply range, area, and speed

Static information storage and retrieval – Floating gate – Particular biasing

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365226, 36523006, G11C 1606

Patent

active

058448403

ABSTRACT:
According to an aspect of the embodiments, the block decoder control circuits which drive the pass transistors for the word lines for a flash memory array are driven with a control voltage that is regulated to be one enhancement transistors threshold voltage higher than the highest voltage that is actually driven onto the word lines. According to another aspect of some of the embodiments, the block decoder control circuits are implemented with transistors having a very low threshold voltage. According to yet another aspect of some of the embodiments, a special series connection is used to prevent any leakage current through the block decoder control circuit from the high voltage generating charge pumps which might otherwise result from the use of low threshold voltage transistors. In the special series connection, any leakage current occurs from the supply voltage source rather than from the high voltage generating charge pumps. According to still another aspect of some of the embodiments, a special gate connection applies an intermediate bias voltage higher than a positive supply voltage onto the gates of the unselected block decoder transistors that are connected to a high-voltage. Several embodiments are presented which combine the regulated control voltage aspect and various combinations of the other aspects.

REFERENCES:
patent: 5524095 (1996-06-01), Someya et al.
patent: 5619448 (1997-04-01), Lin
patent: 5659502 (1997-08-01), Sali et al.
patent: 5721704 (1998-02-01), Morton

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