Semiconductor device having improved lamination-structure reliab

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

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438528, 438643, 438648, 438656, 438651, 438655, 438658, 438918, H01L 21425, H01L 2144, H01L 214763

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active

060081244

ABSTRACT:
After formation of a connection hole or before deposition of an insulator film, a semiconductor device is placed onto a cathode of a plasma generator. A surface of a metal silicide film such as a silicide of titanium is exposed to a plasma of a nitrogen-containing gas at 550 degrees centigrade or less. As a result of such processing, a barrier compound layer, composed of a compound of nitrogen, oxygen, metal and silicon, is formed at a near-surface region of the metal silicide film of the titanium silicide film. Thereafter, while forming a buried layer from material superior in step coverage such as an Al--Ti compound and an aluminum alloy, reaction between the metal silicide film and the buried layer in a later annealing treatment can be avoided without depositing a barrier metal such as a titanium nitride
itride film in the connection hole. Accordingly, contact resistance, sheet resistance and junction leakage can be reduced and reliability can be improved.

REFERENCES:
patent: 5378660 (1995-01-01), Ngan et al.
patent: 5389575 (1995-02-01), Chin et al.
patent: 5397744 (1995-03-01), Sumi et al.
patent: 5545592 (1996-08-01), Iacoponi
patent: 5550079 (1996-08-01), Lin
patent: 5656546 (1997-08-01), Chen et al.
Hornstrom, S.E. et al., TiN formed by ion beam nitriding of TiSi.sub.2, Journal of Vacuum Science and Technology: Part A, vol. 7, No. 3, Part 01, May 1989, pp. 565-569, XP000126070 (abstract; Fig. 2).
Sekiguchi, M. et al., "Self-aligned barrier layer formation on TiSi.sub.2 layer with N2 plasma treatment" Jun. -(18-20)-1996 Proceedings Thirteenth Intl. VLSI Multilevel Interconnection Conference (VMIC), Proceedings of Thirteeth Intl. VLSI Multilevel Interconnection (V-MIC) Conf 180-180E.
Y. Takegawa et al, A Highly Reliable Interconnection with Collimated Sputtering of Barrier Layer and High Temperature Sputtering of Al Alloy on Silicide Junction, 1993 International Conference on Solid State Devices and Materials, pp. 558-560.
Hiroshi Shinriki, et a., Selective CVD-AI Contact Plug on Rapid Thermal Processed TiSi2 in NH3 for High Speed CMOS Using Salicide Process, 1994 International Conference on Solid State Devices and Materials, pp. 946-948 .

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