Non-volatile memory, semiconductor memory device having the non-

Static information storage and retrieval – Floating gate – Particular biasing

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365182, G11C 1140

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active

053253272

ABSTRACT:
A non-volatile memory device includes a semiconductor layer, floating gates, control gates, pairs of first and second impurity diffused layers formed in the semiconductor layer and located on both sides of the control gates Word lines are electrically connected to the control gates, and bit lines are electrically connected to the first impurity diffused layers and perpendicular to the word lines Wiring electrodes are electrically connected to the second impurity diffused layers, and run in a direction in which the bit lines run. Areas including the pairs of first and second impurity diffused areas are obliquely arranged with respect to the bit lines.

REFERENCES:
patent: 4672580 (1987-06-01), Yau et al.
patent: 5057448 (1991-10-01), Kuroda
Patent Abstracts of Japan, vol. 13, No. 534 (E-852) Nov. 29, 1989 & JP-A-1 218061 (Hitachi Ltd) Aug. 31, 1989.
Atsumi et al., "Non-Volatile and Fast Static Memories," 1990 IEEE International Solid-State Circuits Conference Digest of Technical Papers, Feb. 14, 1990, San Francisco, Calif., pp. 58-59.
Patent Abstracts of Japan, vol. 14, No. 133 (E-902) [4076] Mar. 13, 1990 & JP-A-2 000356 (Hitachi Ltd) Jan. 5, 1990.
Patent Abstracts of Japan, vol. 15, No. 170 (E-1062) Apr. 30, 1991 & JP-A-3 038061 (Fujitsu Ltd) Feb. 19, 1991.

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