Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1995-04-20
1996-01-02
Crane, Sara W.
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257 64, 257324, 257325, 257646, H01L 29788, H01L 2968
Patent
active
054811287
ABSTRACT:
A flash memory cell includes the usual thermal oxide layer deposited above the substrate including the source and the drain. On the thermal oxide layer, a silicon rich oxide layer is formed. Above the silicon rich oxide layer a gate structure is formed of layer of polysilicon separated by an intermediate dielectric layer. The lower polysilicon layer commences as an initial portion of the layer of small grain size followed by either amorphous or large grain size material.
REFERENCES:
patent: 3649884 (1972-03-01), Haneta
patent: 4253106 (1981-02-01), Goldsmith et al.
patent: 4688078 (1987-08-01), Hseih
patent: 4717943 (1988-01-01), Wolf et al.
patent: 4748133 (1988-05-01), Griswold
patent: 5229631 (1993-07-01), Woo
patent: 5284786 (1994-02-01), Sethi
patent: 5289026 (1994-02-01), Ong
patent: 5331185 (1994-07-01), Chan et al.
Crane Sara W.
Jones II Graham S.
Saile George O.
Tang Alice W.
United Microelectronics Corporation
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