Static information storage and retrieval – Read/write circuit – Testing
Patent
1995-09-08
1997-10-07
Nelms, David C.
Static information storage and retrieval
Read/write circuit
Testing
371 225, G11C 1300
Patent
active
056755457
ABSTRACT:
An integrated circuit random access memory includes a built in self-test ("BIST") system that has separate address counters and scan registers positioned adjacent each of a plurality of memory blocks. A controller is included as part of the test system for generating test patterns, providing an output that indicates whether the memory blocks have passed the test, and for performing other test control functions. The scan registers can also be alternatively used for testing the memory with external test vectors. The test system is designed into an integrated circuit by providing various database files of test system blocks from which a combination may be made to meet the requirements of various types of memory modules and provide a desired BIST algorithm. In designing such a circuit, the designer specifies certain information, such as the memory type to be used, the BIST algorithm to be implemented, and similar high level information. The appropriate database files are then automatically selected and connections between them defined, in a hierarchical way, by software processing. In this processing, small blocks are combined into larger blocks having specified external connections, and then these larger blocks are combined by defining how their external connections are connected together and externally. If more than two levels of blocks are being used, this process is continued. The result is a database defining a customized integrated circuit memory with BIST.
REFERENCES:
patent: 4433413 (1984-02-01), Fasang
patent: 4996691 (1991-02-01), Wilcox et al.
patent: 5138619 (1992-08-01), Fasang et al.
patent: 5311520 (1994-05-01), Raghavachari
patent: 5325367 (1994-06-01), Dekker et al.
patent: 5349587 (1994-09-01), Nadeau-Dostie et al.
patent: 5469443 (1995-11-01), Saxena
patent: 5471482 (1995-11-01), Byers et al.
Gill Barginderpal S.
Madhavan Rajeev
Ambit Design Systems, Inc.
Nelms David C.
Tran Michael T.
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