Adhesive bonding and miscellaneous chemical manufacture – Delaminating processes adapted for specified product – Delaminating in preparation for post processing recycling step
Patent
1989-05-22
1990-05-08
Lacey, David L.
Adhesive bonding and miscellaneous chemical manufacture
Delaminating processes adapted for specified product
Delaminating in preparation for post processing recycling step
156653, 156657, 1566591, 156662, 437 69, 437 72, 437 73, 437228, 437238, 437241, B05D 512, H01L 21306
Patent
active
049235630
ABSTRACT:
An integrataed circuit fabrication process for creating field oxide regions having substantially no bird's beak, a relatively planar concluding surface, substantially no stress induced dislocations at the edges of the active regions, and a substantial absence of notches or grooves at the edges of the active silicon, by a selective combination of material dimensions and process operations. In one form of practicing the invention, the process utilizes a relatively thick pad oxide below the masking nitride layer, and a second, very thin, sidewall masking nitride layer. The thin sidewall masking nitride layer does not utilize an underlying pad oxide layer. Upon oxidation, the thin sidewall nitride is concurrently lifted and converted to oxide, the materials and dimension being selected to ensure that when the field oxide level approaches the level of the thick pad oxide layer stresses at the corners of the active silicon region are relieved through various oxide paths and accentuated oxidation effects.
REFERENCES:
patent: 3958040 (1976-05-01), Webb
patent: 4088516 (1978-05-01), Kondo et al.
patent: 4272308 (1981-06-01), Varshney
patent: 4333965 (1982-06-01), Chow et al.
patent: 4398992 (1983-08-01), Fang et al.
patent: 4563227 (1986-01-01), Sakai et al.
patent: 4564394 (1986-01-01), Bussmann
patent: 4604162 (1986-08-01), Sobczak
patent: 4622096 (1986-11-01), Dil et al.
patent: 4631219 (1986-12-01), Geipel, Jr. et al.
patent: 4755477 (1988-07-01), Chao
Chiu et al., "The Swami-A Defect Free and Near-Zero Bird's-Beak Local Oxidatic Process and . . .", IEDM 82, pp. 224-227, 1982.
Inuishi et al., "Defect Free Process of a Bird's Beak Reduced LOCOS", Abstract No. 273 in an unknown publication, pp. 409-410, of 1985 or later date.
Teng et al., "Optimization of Sidewall Masked Isolation Process", IEEE Journal of Solid-State Circuits, pp. 44-51, Feb. 1985.
Oldham et al., "Isolation Technology for Scaled MOS VLSI", IEDM 82, 1982 IEEE, pp. 216-219.
Chiu et al., "A Bird's Beak Free Local Oxidation Technology Feasible for VLSI Circuits Fabrication", IEEE Transactions on Electron Devices, 04/82, pp. 536-540.
Chiu et al., "The Sloped-Wall SWAMI-A Defect-Free Zero Birds-Beak Local Oxidatic Process . . .", IEEE Transactions on Electron Devices, vol. ED30, No. 11, Nov. 1983.
Fang et al., "Defect Characteristics and Generation Mechanism in a Bird Beak Free Structure . . .", Journal of Electrochemical Society, pp. 190-196, 1983.
Tsai et al., "A New Fully Recessed-Oxide (FUROX) Field Isolation Technology for Scaled . . .", IEEE Electron Device Letters, pp. 124-126, Feb. 1986.
Kahng et al., "A Method for Area Saving Planar Isolation Oxides Using Oxidation Protected Sidewalls", Journal of Electrochemical Society, pp. 2468-2471, Nov. 1980.
Deroux-Dauhphin et al., "Physical and Electrical Characterization of a SILO Isolation Structure", IEEE Transactions on Electron Devices, vol. ED-32, No. 11, Nov. 1985, pp. 2392-2398.
Dang Thi
Hawk Jr. Wilbert
Lacey David L.
NCR Corporation
Salys Casimer K.
LandOfFree
Semiconductor field oxide formation process using a sealing side does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor field oxide formation process using a sealing side, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor field oxide formation process using a sealing side will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2347264