Method and system for updating information on an intelligent dis

Details Method and system for updating information on an intelligent dis Method and system for updating information on an intelligent dis

1998-03-06

2000-04-18

Palys, Joseph E.

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

713 2, G06F 1100

Patent

active

060528001

ABSTRACT:
A system for monitoring a computer system with an external status monitor during the power-on self test (POST) of the computer system. The computer system has tasks to be performed during the POST process. Each task has a token corresponding to an original message or a subsequently added message. Each subsequently added message is stored in the computer system, and each original message is stored in the external status monitor. Under the control of the computer system, the system identifies a task for the computer system to perform. The system then retrieves the token for the identified task and determines whether the retrieved token corresponds to an original message or a subsequently added message. If the retrieved token corresponds to an original message, the system sends only the retrieved token to the external status monitor. If not, the system retrieves the stored message for the retrieved token, notifies the external status monitor that a message will be sent, and sends a token and the retrieved message to the external status monitor. Under the control of the external status monitor, the system receives the token sent from the computer system. When the received token corresponds to an original message, the system retrieves the corresponding message for the received token and displays the retrieved message. When the external status monitor is notified that a new message is being sent, the system receives the message sent from the computer system and displays the received message.

REFERENCES:
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patent: 5630048 (1997-05-01), La Joie et al.
patent: 5761505 (1998-06-01), Golson et al.
patent: 5930503 (1999-07-01), Drees
patent: 5933594 (1999-08-01), La Joie et al.
"Microprocessor System Hardware Monitor", National Semiconductor Product Folder, pp. 1-2, http://www.national.com/pf/LM/LM78.html, (Information as of Jul. 7, 1998) (visited Jul. 8, 1998).
"Microprocessor System Hardware Monitor", National Semiconductor, pp. 1-31, http://www.national.com/ds/LM/LM78.pdf, Mar. 1998, (visited Jul. 8, 1998).

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