Semiconductor memory device allowing acceleration testing, and a

Details Semiconductor memory device allowing acceleration testing, and a Semiconductor memory device allowing acceleration testing, and a

1996-02-15

1998-01-06

Nguyen, Tan T.

Static information storage and retrieval

Read/write circuit

Testing

36523006, 365203, G11C 2900

Patent

active

057062331

ABSTRACT:
A DRAM includes a row predecoder responsive to an multi-selection signal for activating all predecode signals independent of a row address signal, and a row decoder unit responsive to the multi-selection signal for activating all decode signals independent of the row address signal. As a result, all word drivers are activated in an acceleration test independent of the row address signal, and all the word lines are driven simultaneously.

REFERENCES:
patent: 5331594 (1994-07-01), Hotta
patent: 5432744 (1995-07-01), Nagata
"Wafer Burn-in (WBI) Technology for RAM's" by T. Furuyama et al., IEDM '93 Digest, IEEE, 1993.
"A 256M DRAM with Simplified Register Control for Low Power Self Refresh and Rapid Burn-in," by Seung-Moon Yeo et al., 1994 Symposium on VLSI Circuits Digest of Technical Papers, IEEE, 1994.

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