Serial access memory device capable of controlling order of acce

Details Serial access memory device capable of controlling order of acce Serial access memory device capable of controlling order of acce

1991-07-31

1997-05-27

Clawson, Jr., Joseph E.

Static information storage and retrieval

Read/write circuit

Serial read/write

365 78, 36518905, 36523008, 365240, G11C 700

Patent

active

056338295

ABSTRACT:
A serial access memory device is disclosed in which order of access to writing and reading memory cell columns can be controlled. A writing column selecting circuit and a reading column selecting circuit are each comprised of ring pointers with a controllable number of stages. The number of stages of the ring pointers is controlled in response to control signals stored in a serial interface circuit. As a result, two ring pointers each having two stages are formed in the writing column selecting circuit while one ring pointer having four stages is formed in the reading column selecting circuit. After two data signals are written in selected two memory cell columns in parallel, written data signals are read out from serially selected four memory cell columns at a speed twice that in the writing. This serial access memory device is applied to a progressive scan conversion circuit for video signal processing.

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A Memory-Based High-Speed Digital Delay Line With a Large Adjustable Length, Mattausch, et al., IEEE Journal of Solid-State Circuits, vol. 23, No. 1, Feb. 1988.

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