Thin film transistor with means to prevent threshold variations

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257 66, 257 75, 257270, 257331, 257366, 257402, H01L 2976, H01L 31036

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active

055481531

ABSTRACT:
Upward and downward variation of a threshold voltage of a TFT is effectively suppressed by a semiconductor device and a method of manufacturing the same. In the semiconductor device, a conductive layer is formed on the substantially same plane as a semiconductor layer forming a channel region and source/drain regions of the TFT, and is spaced from the semiconductor layer by a predetermined distance. A predetermined potential is applied to the conductive layer. Thereby, an electric field is applied from the conductive layer to the channel region of the TFT, so that variation of the threshold voltage of the TFT is effectively prevented.

REFERENCES:
patent: 4319263 (1982-03-01), Rao
patent: 4636824 (1987-01-01), Ikoma et al.
patent: 5338959 (1994-08-01), Kim et al.
"Negative Bias Temperature Instability in Poly-Si TFTs", S. Maeda et al., 1993 Symposium on VLSI Technology 3B-3, pp. 29-30.
"Thin Film Effects of Double-Gate Polysilicon MOSFET", T. Hashimoto et al., Extended Abstract of the 22nd Conference, pp. 393-396.
"A Half-Micron SRAM Cell Using a Double-Gated Self-Aligned Polysilicon PMOS Thin Film Transistor (TFT) Load", 1990 Symposium on VLSI Technology, pp. 19-20.

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