Semiconductor chip having a chip metal layer and a transfer meta

Details Semiconductor chip having a chip metal layer and a transfer meta Semiconductor chip having a chip metal layer and a transfer meta

1994-09-06

1997-01-21

Tran, Minhloan

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

257700, 257723, 257777, 257692, H01L 2348

Patent

active

055962262

ABSTRACT:
A fabrication method including a semiconductor chip kerf clear process and a resulting semiconductor chip and electronic module formed thereby. The fabrication method includes providing a wafer comprising a plurality of integrated circuit chips having kerf regions between them. Chip metallization is present within the kerf regions. A photolithography process is used to protect the wafer exposing only the kerf regions. Next, the wafer is etched, clearing the chip metallization from the kerf regions. The wafer is then diced and the chips are stacked to form a monolithic electronic module. A side surface of the electronic module is processed to expose transfer metals extending thereto, thereby facilitating electrical connection to the chips within the electronic module. Specific details of the fabrication method, resulting integrated circuit chips and monolithic electronic module are set forth.

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IBM Technical Disclosure Bulletin, vol. 32, No. 3B, Aug. 1989, New York pp. 410-411, `process for producing lateral chip connectors`.

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