Semiconductor memory device and a manufacturing method of the sa

Details Semiconductor memory device and a manufacturing method of the sa Semiconductor memory device and a manufacturing method of the sa

1995-07-21

1997-01-21

Meier, Stephen

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257904, 257903, H01L 27108, H01L 2976, H01L 2994, H01L 31119

Patent

active

055962122

ABSTRACT:
A memory cell of an SRAM prevents imbalance between GND potentials of a pair of driver transistors. In the memory cell, the driver transistors Q.sub.1 and Q.sub.2 in a pair have the common source region.

REFERENCES:
patent: 4744056 (1988-05-01), Yu et al.
Proceedings of the Symposium on VLSI Technology, OISO, Japan, May 28-30, 1991, No. SYMP. 11, 28 May 1991 Institute of Electrical and Electronics Engineers, pp. 25-26, XP 000260004, Uemoto Y et al., `1.5 V Supply Voltage, Low Standby current SRAMS`, Fig. 1.
T. Yamanaka et al., "A 5.9 .mu.m.sup.2 Super Low Power SRAM Cell Using a New Phase-Shift Lithography", International Electron Devices Meeting, 1990, pp. 477-480.
Kazuo Itabashi et al., "A Split Wordline Cell for 16Mb SRAM Using Polysilicon Sidewall Contacts", International Electron Devices Meeting, 1991, pp. 477-480.
H. Ohkubo et al., "16 Mbit SRAM Cell Technologies for 2.0 V Operation", International Electron Devices Meeting, 1991, pp. 481-484.

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