Method of fabricating a border-less via

Details Method of fabricating a border-less via Method of fabricating a border-less via

1997-10-09

2000-01-25

Booth, Richard

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438622, 438626, 438627, 438637, 438643, 438653, 438970, H01L 214763

Patent

active

060178159

ABSTRACT:
A method of fabricating a border-less via. A semiconductor substrate which comprises patterned metal lines, a gap therebetween, and a first dielectric layer filled within the gap is provide. A second insulating layer is formed over the metal lines and the first dielectric layer. Using a photomask, the second dielectric layer is patterned and etched to form a via. A conductive plug is formed within the via and a second conductive layer is formed over the fourth conductive layer. Thus, the first and second conductive layers are connected by the conductive plug.

REFERENCES:
patent: 4767724 (1988-08-01), Kim et al.
patent: 5858870 (1996-12-01), Zheng et al.
patent: 5858882 (1999-01-01), Chang et al.

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