Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Patent
1995-11-21
1998-07-28
Wilczewski, Mary
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
438459, 216 66, H01L 21336
Patent
active
057862427
ABSTRACT:
It is intended to provide a method for forming a semiconductor integrated circuit using single crystal silicon on an inexpensive substrate such as glass. An insulating layer mainly made of silicon oxide and having a seed opening is provided on a single crystal silicon wafer, and a non-single-crystal silicon film is deposited thereon. The non-single-crystal silicon film is melted starting from the seed opening by scanning it with, for instance, a strip heater, and thereby converted into a substantially single-crystalline silicon film. After a device is formed by using the thus-produced single crystal film, an insulative substrate such as a glass substrate is bonded to the device surface. Then, the silicon substrate is etched by leaving it in an atmosphere of a halogen fluoride such as ClF.sub.3 in a non-plasmic state. Before the etching with a halogen fluoride, the silicon substrate may be polished to a thickness of 10 to 100 .mu.m. Having a large selective etching ratio of silicon to silicon oxide, a halogen fluoride etches only silicon, i.e., hardly etches silicon oxide. Therefore, there does not occur a case that silicon oxide layer is overetched to destroy the device. Thus, an integrated circuit having better characteristics can be formed on an insulative substrate with a high yield.
REFERENCES:
patent: 4310380 (1982-01-01), Flamm et al.
patent: 4498953 (1985-02-01), Cook et al.
patent: 4980308 (1990-12-01), Hayashi et al.
patent: 5089441 (1992-02-01), Moslehi
patent: 5326406 (1994-07-01), Kaneko et al.
patent: 5350480 (1994-09-01), Gray
patent: 5403434 (1995-04-01), Moslehi
patent: 5427052 (1995-06-01), Ohta et al.
patent: 5441594 (1995-08-01), Zenke
patent: 5534107 (1996-07-01), Gray et al.
patent: 5589419 (1996-12-01), Ochiai
patent: 5641380 (1997-06-01), Yamazaki et al.
Ibbotson et al., "Plasmaless Dry Etching of Silicon With Fluorine-Containing Compounds", J. Appl. Phys. vol. 56, No. 10, 15 Nov. 1984, pp. 2939-2942.
Saito et al., "Plasmaless Etching of Silicon Using Chlorine Trifluoride", J. Vac. Sci, Technol. B, vol. 9, No. 5, Sep./Oct. 1991, pp. 2503-2506.
Takemura Yasuhiko
Yamazaki Shunpei
Ferguson Jr. Gerald J.
Semiconductor Energy Laboratory Co,. Ltd.
Wilczewski Mary
LandOfFree
Method of manufacturing SOI semiconductor integrated circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of manufacturing SOI semiconductor integrated circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing SOI semiconductor integrated circuit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-23026