MOSFET transistor cell manufactured with selectively implanted p

Details MOSFET transistor cell manufactured with selectively implanted p MOSFET transistor cell manufactured with selectively implanted p

1996-01-30

1998-03-24

Whitehead, Jr., Carl W.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257344, 257408, H01L 2776, H01L 2994, H01L 31062

Patent

active

057316112

ABSTRACT:
A n-channel MOSFET device is formed with a selective high energy boron implantation into the N region of the n- channel where a photoresist is employed to cover the central portion over the channel. Small n- regions are formed near the channel source interface. These small n- regions have the advantages of preventing punch through. The selective implant regions have the additional advantages that the JFET resistance is not increased as a result of forming a punch through prevention region near the source channel boundary. Also disclosed in this invention is a p-type DMOS where a novel boron implantation is applied to reduce the threshold voltage. The boron is selectively implanted into the n-type channel near the source, i.e., a threshold sensitive region. The threshold voltage is reduced without unduly lowering the drain to source breakdown voltage.

REFERENCES:
patent: 5554544 (1996-09-01), Hsu

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