One transistor ferroelectric memory cell and method of making th

Details One transistor ferroelectric memory cell and method of making th One transistor ferroelectric memory cell and method of making th

1997-03-07

1998-03-24

Tsai, Jey

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

438240, 438 3, 438250, H01L 218242

Patent

active

057316082

ABSTRACT:
A method of forming a semi-conductor structure forming, on a prepared substrate, a ferroelectric memory (FEM) gate unit. A gate junction region is formed between the source junction region and the drain junction region for the FEM gate unit on a FEM gate unit device area, which FEM gate unit includes a lower metal layer, a ferroelectric (FE) layer, and an upper metal layer, and which is formed on a conductive channel precursor.
The structure of the semiconductor includes a substrate, which may be either bulk silicon or SOI-type silicon, conductive channels of first and second type formed above the substrate, an FEM gate unit formed above a channel region, wherein the FEM gate unit includes a lower metal layer, an FE layer, and an upper metal layer, and wherein a conductive channel of a second type is formed under the FEM gate unit.

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