Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1997-10-01
1999-07-13
Booth, Richard A.
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438657, 438622, 438666, H01L 214763
Patent
active
059240083
ABSTRACT:
An integrated circuit is provided having an improved interconnect structure. The interconnect structure includes a power-coupled local interconnect which is always retained at VDD or VSS (i.e., ground) level. The local interconnect resides a dielectric-spaced distance below critical runs of overlying interconnect. The powered local interconnect serves to sink noise transients from the critical conductors to ensure that circuits connected to the conductors do not inoperably function. Accordingly, the local interconnect extends along a substantial portion of the conductor length, and is either wider or narrower than the conductor under which it extends. The local interconnect can either be polysilicon, doped polysilicon, polycide, refractory metal silicide, or multi-level refractory metal.
REFERENCES:
patent: 4392150 (1983-07-01), Courreges
patent: 4894693 (1990-01-01), Tigelaar et al.
patent: 5124774 (1992-06-01), Godhino et al.
patent: 5717242 (1998-02-01), Michael et al.
Bandyopadhyay Basab
Brennan William S.
Dawson Robert
Fulford Jr. H. Jim
Hause Fred N.
Advanced Micro Devices , Inc.
Booth Richard A.
Daffer Kevin L.
Zarneke David A.
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