Method for testing floating gate cells

Static information storage and retrieval – Read/write circuit – Testing

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36518522, 36518529, G11C 700

Patent

active

059236027

ABSTRACT:
A method is described for testing the programming function of integrated circuit device cells including floating gate elements. To accelerate the testing process, at most two programming pulses are needed, the two pulses being applied with the device at minimum and maximum power supply voltage levels specified for the device. First, the cell state after an initial programming pulse with the device at a minimum power supply voltage level, tested against a minimum reference voltage level, indicates whether the cell is programming properly. If not, testing ceases immediately and the device is rejected after the first pulse. Devices passing the first reading after the first pulse are subjected to a second reading at the target (higher) reference voltage. Devices passing after the second reading are designated as passing and are subjected to the next test in the test flow. Devices failing the second reading are subjected to a second programming pulse, applied with the device at the maximum power supply voltage level, the resulting cell state providing an indication of cell programming functionality. The same pulse series can also be used to test erase functionality.

REFERENCES:
patent: 5109257 (1992-04-01), Kondo
patent: 5675544 (1997-10-01), Hashimoto
patent: 5675546 (1997-10-01), Leung
patent: 5790459 (1998-08-01), Roohparvar

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