Composite semiconductor storage device and operating method ther

Details Composite semiconductor storage device and operating method ther Composite semiconductor storage device and operating method ther

1991-09-25

1993-08-03

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Differential sensing

36518901, G11C 702

Patent

active

052335615

ABSTRACT:
A semiconductor storage device formed on a single chip includes a ROM, a RAM and an input/output port. When a mode setting signal designates a normal mode, access is made to one of the ROM, RAM and input/output port in response to an address signal. The ROM is accessed when the mode setting signal designates a ROM write mode and the address signal designates an address assigned to the ROM. A dummy data is output from a data input/output terminal when the mode setting signal designates the ROM write mode, the address signal designates an address outside an address region assigned to the ROM, and a read signal is applied to the device.

REFERENCES:
patent: 4757474 (1988-07-01), Fukushi
patent: 4783764 (1988-11-01), Tsuchiya
patent: 4905191 (1990-02-01), Arai
patent: 5001670 (1991-03-01), Slate
Universal Peripheral Interface 8-Bit Slave Microcontroller, Intel (Preliminary), Oct. 1987, pp. 9-54-9-69.

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