Semiconductor memory device with redundancy circuit

Static information storage and retrieval – Read/write circuit – Bad bit

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Details

36523003, 36523006, G11C 700

Patent

active

058944419

ABSTRACT:
A semiconductor memory device which enhances the relief efficiency of defective bit lines by means of redundant bit lines is disclosed. To a column redundancy decoder are supplied not only a Y address but also a part of an X address. When a Y address corresponding to a defective bit line is supplied to the column redundancy decoder, the column redundancy decoder generates a detection signal. In this case, replacement by means of a redundant bit line is carried out if the part of the X address indicates a region where the defective bit line exists, and the replacement by means of a redundant bit line will not take place if it indicates a region where the defective bit line does not exists.

REFERENCES:
patent: 5349556 (1994-09-01), Lee
patent: 5355339 (1994-10-01), Oh et al.
patent: 5359560 (1994-10-01), Suh et al.
patent: 5798974 (1998-08-01), Yamagata
patent: 5808948 (1998-09-01), Kim et al.

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