Nonvolatile semiconductor memory device having a status register

Details Nonvolatile semiconductor memory device having a status register Nonvolatile semiconductor memory device having a status register

1994-02-07

1995-03-28

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Differential sensing

365201, G11C 702

Patent

active

054023807

ABSTRACT:
An object of the present invention is to provide a semiconductor device that permits easy and efficient testing. A nonvolatile semiconductor memory including word lines WLi and bit lines BLi, a memory cell matrix 17 including nonvolatile memory cells Cij, a sense amplifier 15, a write/erase timing circuit 9 for performing timing control necessary for write and erase operations, and a status register 2 for storing the operating state of the memory at the completion of the operation of the circuit 9, wherein there are provided, outside the address of the memory cell matrix 17, two kinds of dummy cells, D1, D2, D3, . . . , whose values are fixed to different values that induce different outputs from the sense amplifier 15. A pass condition or a fail condition is generated by accessing the dummy cells.

REFERENCES:
patent: 4817052 (1989-03-01), Shinoda
patent: 5214604 (1993-05-01), Kato
patent: 5224070 (1993-06-01), Fandrich et al.

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