Method of forming bit lines having lower conductivity in their r

Details Method of forming bit lines having lower conductivity in their r Method of forming bit lines having lower conductivity in their r

1994-05-16

1997-09-30

Tsai, Jey

Fishing, trapping, and vermin destroying

437 52, 437 44, H01L 21265

Patent

active

056725329

ABSTRACT:
A buried bit line ROM is disclosed having orthogonal sets of buried bit lines and polysilicon word lines. Polysilicon spacers are disposed on either side of each of the bit lines. The polysilicon spacers are slightly doped. The bit lines have a doping profile so that the edges of each bit line is doped less and the center of each bit line is doped more.

REFERENCES:
patent: 5362662 (1994-11-01), Ando et al.
patent: 5418175 (1995-05-01), Hsue et al.
patent: 5418176 (1995-05-01), Yang et al.

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