Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent
1997-06-12
1999-04-20
Everhart, Caridad
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
438677, 438641, 438674, 438682, 438683, H01L 21441
Patent
active
058952616
ABSTRACT:
A local area interconnect structure comprising one or more electrically conductive interconnects formed from electrically conductive metal compounds is described and a process for forming same. Electrically conductive metal compounds are selectively deposited in one or more trenches which were previously formed in an insulation layer in a configuration conforming to the desired pattern of the electrically conductive interconnects. A seed layer is first selectively formed on surfaces of the trenches and the electrically conductive metal compound is then selectively deposited over the seed layer in the trench, but not on the exposed surfaces of the insulation layer.
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Sanganeria Mahesh K.
Schinella Richard
Everhart Caridad
LSI Logic Corporation
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